Index: hw/mips.h
===================================================================
--- hw/mips.h	(revision 7037)
+++ hw/mips.h	(working copy)
@@ -2,6 +2,8 @@
 #define HW_MIPS_H
 /* Definitions for mips board emulation.  */
 
+typedef struct rc4030DMAState *rc4030_dma;
+
 /* gt64xxx.c */
 PCIBus *pci_gt64120_init(qemu_irq *pic);
 
@@ -9,6 +11,11 @@
 void *ds1225y_init(target_phys_addr_t mem_base, const char *filename);
 void ds1225y_set_protection(void *opaque, int protection);
 
+/* dp8393x.c */
+void dp83932_init(NICInfo *nd, target_phys_addr_t base, int it_shift,
+                  qemu_irq irq, void* mem_opaque,
+                  void (*memory_rw)(void *opaque, target_phys_addr_t addr, uint8_t *buf, int len, int is_write));
+
 /* g364fb.c */
 int g364fb_mm_init(uint8_t *vram, ram_addr_t vram_offset,
                    int vram_size, target_phys_addr_t vram_base,
@@ -28,10 +35,11 @@
 extern void cpu_mips_clock_init(CPUState *);
 
 /* rc4030.c */
-typedef struct rc4030DMAState *rc4030_dma;
-typedef void (*rc4030_dma_function)(void *dma, uint8_t *buf, int len);
-qemu_irq *rc4030_init(qemu_irq timer, qemu_irq jazz_bus,
-                      rc4030_dma **dmas,
-                      rc4030_dma_function *dma_read, rc4030_dma_function *dma_write);
+void rc4030_dma_memory_rw(void *opaque, target_phys_addr_t addr, uint8_t *buf, int len, int is_write);
+void rc4030_dma_read(void *dma, uint8_t *buf, int len);
+void rc4030_dma_write(void *dma, uint8_t *buf, int len);
 
+void *rc4030_init(qemu_irq timer, qemu_irq jazz_bus,
+                  qemu_irq **irqs, rc4030_dma **dmas);
+
 #endif
Index: hw/mips_jazz.c
===================================================================
--- hw/mips_jazz.c	(revision 7037)
+++ hw/mips_jazz.c	(working copy)
@@ -134,10 +134,11 @@
     CPUState *env;
     qemu_irq *rc4030, *i8259;
     rc4030_dma *dmas;
-    rc4030_dma_function dma_read, dma_write;
+    void* rc4030_opaque;
     void *scsi_hba;
     int hd;
     int s_rtc, s_dma_dummy;
+    NICInfo *nd;
     PITState *pit;
     BlockDriverState *fds[MAX_FD];
     qemu_irq esp_reset;
@@ -183,8 +184,7 @@
     cpu_mips_clock_init(env);
 
     /* Chipset */
-    rc4030 = rc4030_init(env->irq[6], env->irq[3],
-                         &dmas, &dma_read, &dma_write);
+    rc4030_opaque = rc4030_init(env->irq[6], env->irq[3], &rc4030, &dmas);
     s_dma_dummy = cpu_register_io_memory(0, dma_dummy_read, dma_dummy_write, NULL);
     cpu_register_physical_memory(0x8000d000, 0x00001000, s_dma_dummy);
 
@@ -213,11 +213,26 @@
     }
 
     /* Network controller */
-    /* FIXME: missing NS SONIC DP83932 */
+    for (n = 0; n < nb_nics; n++) {
+        nd = &nd_table[n];
+        if (!nd->model)
+            nd->model = "dp83932";
+        if (strcmp(nd->model, "dp83932") == 0) {
+            dp83932_init(nd, 0x80001000, 2, rc4030[4],
+                         rc4030_opaque, rc4030_dma_memory_rw);
+            break;
+        } else if (strcmp(nd->model, "?") == 0) {
+            fprintf(stderr, "qemu: Supported NICs: dp83932\n");
+            exit(1);
+        } else {
+            fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd->model);
+            exit(1);
+        }
+    }
 
     /* SCSI adapter */
     scsi_hba = esp_init(0x80002000, 0,
-                        dma_read, dma_write, dmas[0],
+                        rc4030_dma_read, rc4030_dma_write, dmas[0],
                         rc4030[5], &esp_reset);
     for (n = 0; n < ESP_MAX_DEVS; n++) {
         hd = drive_get_index(IF_SCSI, 0, n);
Index: hw/rc4030.c
===================================================================
--- hw/rc4030.c	(revision 7037)
+++ hw/rc4030.c	(working copy)
@@ -675,7 +675,7 @@
     qemu_put_be32(f, s->itr);
 }
 
-static void rc4030_dma_memory_rw(void *opaque, target_phys_addr_t addr, uint8_t *buf, int len, int is_write)
+void rc4030_dma_memory_rw(void *opaque, target_phys_addr_t addr, uint8_t *buf, int len, int is_write)
 {
     rc4030State *s = opaque;
     target_phys_addr_t entry_addr;
@@ -766,13 +766,13 @@
     int n;
 };
 
-static void rc4030_dma_read(void *dma, uint8_t *buf, int len)
+void rc4030_dma_read(void *dma, uint8_t *buf, int len)
 {
     rc4030_dma s = dma;
     rc4030_do_dma(s->opaque, s->n, buf, len, 0);
 }
 
-static void rc4030_dma_write(void *dma, uint8_t *buf, int len)
+void rc4030_dma_write(void *dma, uint8_t *buf, int len)
 {
     rc4030_dma s = dma;
     rc4030_do_dma(s->opaque, s->n, buf, len, 1);
@@ -795,18 +795,16 @@
     return s;
 }
 
-qemu_irq *rc4030_init(qemu_irq timer, qemu_irq jazz_bus,
-                      rc4030_dma **dmas,
-                      rc4030_dma_function *dma_read, rc4030_dma_function *dma_write)
+void *rc4030_init(qemu_irq timer, qemu_irq jazz_bus,
+                  qemu_irq **irqs, rc4030_dma **dmas)
 {
     rc4030State *s;
     int s_chipset, s_jazzio;
 
     s = qemu_mallocz(sizeof(rc4030State));
 
+    *irqs = qemu_allocate_irqs(rc4030_irq_jazz_request, s, 16);
     *dmas = rc4030_allocate_dmas(s, 4);
-    *dma_read = rc4030_dma_read;
-    *dma_write = rc4030_dma_write;
 
     s->periodic_timer = qemu_new_timer(vm_clock, rc4030_periodic_timer, s);
     s->timer_irq = timer;
@@ -821,5 +819,5 @@
     s_jazzio = cpu_register_io_memory(0, jazzio_read, jazzio_write, s);
     cpu_register_physical_memory(0xf0000000, 0x00001000, s_jazzio);
 
-    return qemu_allocate_irqs(rc4030_irq_jazz_request, s, 16);
+    return s;
 }
Index: Makefile.target
===================================================================
--- Makefile.target	(revision 7037)
+++ Makefile.target	(working copy)
@@ -614,7 +614,7 @@
 ifeq ($(TARGET_BASE_ARCH), mips)
 OBJS+= mips_r4k.o mips_jazz.o mips_malta.o mips_mipssim.o
 OBJS+= mips_timer.o mips_int.o dma.o vga.o serial.o i8254.o i8259.o rc4030.o
-OBJS+= g364fb.o jazz_led.o
+OBJS+= g364fb.o jazz_led.o dp8393x.o
 OBJS+= ide.o gt64xxx.o pckbd.o ps2.o fdc.o mc146818rtc.o usb-uhci.o acpi.o ds1225y.o
 OBJS+= piix_pci.o parallel.o cirrus_vga.o pcspk.o $(SOUND_HW)
 OBJS+= mipsnet.o
