From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1Lv90q-00050H-GW for qemu-devel@nongnu.org; Sat, 18 Apr 2009 07:47:12 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1Lv90l-0004uL-JA for qemu-devel@nongnu.org; Sat, 18 Apr 2009 07:47:12 -0400 Received: from [199.232.76.173] (port=58375 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Lv90k-0004u8-HM for qemu-devel@nongnu.org; Sat, 18 Apr 2009 07:47:07 -0400 Received: from vsmtp03.dti.ne.jp ([202.216.231.138]:45601) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1Lv90j-00046a-R7 for qemu-devel@nongnu.org; Sat, 18 Apr 2009 07:47:06 -0400 Received: from [192.168.1.20] (PPPa1540.e11.eacc.dti.ne.jp [124.255.92.23]) by vsmtp03.dti.ne.jp (3.11v) with ESMTP AUTH id n3IBl37M016157 for ; Sat, 18 Apr 2009 20:47:03 +0900 (JST) Message-ID: <49E9BDBF.1060503@juno.dti.ne.jp> Date: Sat, 18 Apr 2009 20:47:11 +0900 From: Shin-ichiro KAWASAKI MIME-Version: 1.0 Subject: Re: [Qemu-devel] Re: SH: support 7785 serial References: <200904022129.02385.vladimir@codesourcery.com> <49DA0064.2070909@juno.dti.ne.jp> In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Vladimir Prus wrote: > Shin-ichiro KAWASAKI wrote: > >>> This patch was tested both with r2d, using kernel and userland found >>> at: >>> >>> thttp://www.assembla.com/wiki/show/qemu-sh4/BuildingEnvironment >>> >>> and with 7785, using a hand-made kernel. >> Patch 2 produces a trouble in my environment. >> For r2d, the output to SCIF from kernel is OK, but output from >> shell is broken by inserted white space, like follows. >> >> (before applying patch 2) >> # ls >> >> (after applying patch2) >> # l s >> >> Do you have time to investigate it? > > The attached revision of the patch fixes the problem for me. I failed to > account for the fact that one cannot write '1' bit into FSR register. I've checked that the new patch avoids the problem. Those 3 patches all seem OK for me. Thank you! Regards, Shin-ichiro KAWASAKI