From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from ovro.ovro.caltech.edu (ovro.ovro.caltech.edu [192.100.16.2]) by ozlabs.org (Postfix) with ESMTP id 75BDADDE07 for ; Tue, 28 Apr 2009 06:01:36 +1000 (EST) Message-ID: <49F60F1C.3050300@ovro.caltech.edu> Date: Mon, 27 Apr 2009 13:01:32 -0700 From: David Hawkins MIME-Version: 1.0 To: Kumar Gala Subject: Re: [PATCH] fsldma: use PCI Read Multiple command References: <20090424183517.GB23140@ovro.caltech.edu> <49F608B7.9080409@ovro.caltech.edu> <49F60A3A.4060402@freescale.com> <49F60BF8.8040404@ovro.caltech.edu> <46B638E2-885C-4281-81EA-CB685264E143@kernel.crashing.org> <49F60EC9.2050501@ovro.caltech.edu> In-Reply-To: <49F60EC9.2050501@ovro.caltech.edu> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Cc: Ira Snyder , Liu Dave-R63238 , linux-kernel@vger.kernel.org, linuxppc-dev@ozlabs.org, Dan Williams , Timur Tabi List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , >> You can mark the pci inbound window on the 83xx as non-prefetchable >> (assuming 83xx is host). On a x86 host I doubt there is any easy way >> to get non-prefetchable memory. One more note; we don't have access to a host-mode MPC8349EA, our boards are all targets. Cheers, Dave