From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Jan Beulich" Subject: c/s 19576 vs. AMD systems Date: Wed, 29 Apr 2009 09:53:01 +0100 Message-ID: <49F8318D.76EA.0078.0@novell.com> Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: quoted-printable Return-path: Content-Disposition: inline List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xensource.com Errors-To: xen-devel-bounces@lists.xensource.com To: Keir Fraser Cc: xen-devel@lists.xensource.com List-Id: xen-devel@lists.xenproject.org Keir, I'm afraid this change is going to hurt on AMD systems where memory = extends beyond the 4Gb boundary: Both such systems that I have direct access to have their Intel MTRRs only defined up to the 4Gb boundary, yet through the use of AMD specific MSRs (SYS_CFG.Tom2ForceMemTypeWB and TOM2) the default memory type for everything beyond the 4Gb boundary is WB. On these systems there shouldn't be any clipping. I certainly can put = together a patch for this, but it'll take me a couple of days until I'd get to it. Jan