From: David Daney <ddaney@caviumnetworks.com>
To: Ralf Baechle <ralf@linux-mips.org>,
linux-mips <linux-mips@linux-mips.org>
Subject: [PATCH 0/3] Remove 'ehb' instructions from Cavium TLB handlers.
Date: Tue, 12 May 2009 12:40:33 -0700 [thread overview]
Message-ID: <4A09D0B1.2030305@caviumnetworks.com> (raw)
The Cavium Octeon CPU never needs the ehb instruction, this patch set
removes it resulting in shorter TLB handler hot paths.
I will reply with the three patches.
David Daney (3):
MIPS: Allow R2 CPUs to turn off generation of 'ehb' instructions.
MIPS: Remove execution hazard barriers for Octeon.
MIPS: Remove dead case label.
arch/mips/include/asm/cpu-features.h | 4 ++++
.../asm/mach-cavium-octeon/cpu-feature-overrides.h | 1 +
arch/mips/mm/tlbex.c | 4 ++--
3 files changed, 7 insertions(+), 2 deletions(-)
next reply other threads:[~2009-05-12 19:43 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-05-12 19:40 David Daney [this message]
2009-05-12 19:41 ` [PATCH 1/3] MIPS: Allow R2 CPUs to turn off generation of 'ehb' instructions David Daney
2009-05-12 19:41 ` [PATCH 2/3] MIPS: Remove execution hazard barriers for Octeon David Daney
2009-05-12 21:56 ` David VomLehn
2009-05-12 19:41 ` [PATCH 3/3] MIPS: Remove dead case label David Daney
2009-05-12 22:41 ` David VomLehn
2009-05-21 17:20 ` [PATCH 0/3] Remove 'ehb' instructions from Cavium TLB handlers Ralf Baechle
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