From mboxrd@z Thu Jan 1 00:00:00 1970 From: Avi Kivity Subject: Re: [Qemu-devel] [PATCH] qemu: msi irq allocation api Date: Thu, 21 May 2009 15:08:18 +0300 Message-ID: <4A154432.1060808@redhat.com> References: <20090520162130.GA22109@redhat.com> <200905211134.21184.paul@codesourcery.com> <4A15346C.8090906@redhat.com> <200905211301.52089.paul@codesourcery.com> Mime-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Cc: qemu-devel@nongnu.org, Carsten Otte , kvm@vger.kernel.org, "Michael S. Tsirkin" , Rusty Russell , virtualization@lists.linux-foundation.org, Christian Borntraeger To: Paul Brook Return-path: Received: from mx2.redhat.com ([66.187.237.31]:37966 "EHLO mx2.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752771AbZEUMLC (ORCPT ); Thu, 21 May 2009 08:11:02 -0400 In-Reply-To: <200905211301.52089.paul@codesourcery.com> Sender: kvm-owner@vger.kernel.org List-ID: Paul Brook wrote: >>>> In any case we need some internal API for this, and qemu_irq looks like >>>> a good choice. >>>> >>> What do you expect to be using this API? >>> >> virtio, emulated devices capable of supporting MSI (e1000?), device >> assignment (not yet in qemu.git). >> > > It probably makes sense to have common infrastructure in pci.c to > expose/implement device side MSI functionality. However I see no need for a > direct API between the device and the APIC. We already have an API for memory > accesses and MMIO regions. I'm pretty sure a system could implement MSI by > pointing the device at system ram, and having the CPU periodically poll that. > Instead of writing directly, let's abstract it behind a qemu_set_irq(). This is easier for device authors. The default implementation of the irq callback could write to apic memory, while for kvm we can directly trigger the interrupt via the kvm APIs. -- error compiling committee.c: too many arguments to function