From mboxrd@z Thu Jan 1 00:00:00 1970 From: Avi Kivity Subject: Re: [Qemu-devel] [PATCH] qemu: msi irq allocation api Date: Thu, 21 May 2009 17:37:45 +0300 Message-ID: <4A156739.6060207@redhat.com> References: <20090520162130.GA22109@redhat.com> <200905211453.14691.paul@codesourcery.com> <4A155EC6.6070501@redhat.com> <200905211514.31059.paul@codesourcery.com> Mime-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Cc: qemu-devel@nongnu.org, Carsten Otte , kvm@vger.kernel.org, "Michael S. Tsirkin" , Rusty Russell , virtualization@lists.linux-foundation.org, Christian Borntraeger To: Paul Brook Return-path: Received: from mx2.redhat.com ([66.187.237.31]:48305 "EHLO mx2.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752989AbZEUOk1 (ORCPT ); Thu, 21 May 2009 10:40:27 -0400 In-Reply-To: <200905211514.31059.paul@codesourcery.com> Sender: kvm-owner@vger.kernel.org List-ID: Paul Brook wrote: > On Thursday 21 May 2009, Avi Kivity wrote: > >> Paul Brook wrote: >> >>>>> which is a trivial wrapper around stl_phys. >>>>> >>>> OK, but I'm adding another level of indirection in the middle, >>>> to allow us to tie in a kvm backend. >>>> >>> kvm has no business messing with the PCI device code. >>> >> kvm has a fast path for irq injection. If qemu wants to support it we >> need some abstraction here. >> > > Fast path from where to where? Having the PCI layer bypass/re-implement the > APIC and inject the interrupt directly into the cpu core sounds a particularly > bad idea. > kvm implements the APIC in the host kernel (qemu upstream doesn't support this yet). The fast path is wired to the in-kernel APIC, not the cpu core directly. The idea is to wire it to UIO for device assignment, to a virtio-device implemented in the kernel, and to qemu. -- error compiling committee.c: too many arguments to function