From mboxrd@z Thu Jan 1 00:00:00 1970 From: Rudolf Marek Date: Mon, 06 Jul 2009 16:34:28 +0000 Subject: [lm-sensors] [PATCH] Add support for Atom CPUs Message-Id: <4A522794.1020507@assembler.cz> MIME-Version: 1 Content-Type: multipart/mixed; boundary="------------010608050801030202000300" List-Id: To: lm-sensors@vger.kernel.org This is a multi-part message in MIME format. --------------010608050801030202000300 Content-Type: text/plain; charset=ISO-8859-2 Content-Transfer-Encoding: 7bit -----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 Hello, Following patch adds support for Atom CPUs. Intel documents TjMax at 90C but some Atoms may have 125C (this is undocumented speculation). The variable is renamed, because next patch use this. Signed-off-by: Rudolf Marek Please test this! Rudolf -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.9 (GNU/Linux) Comment: Using GnuPG with Mozilla - http://enigmail.mozdev.org iEYEARECAAYFAkpSJ5QACgkQ3J9wPJqZRNU3jwCgm2dIVplikohpmBHd9FPyIECj mY8AnjSRQoKdl7VKZJawJ+l6NH6I5LKI =1Mg+ -----END PGP SIGNATURE----- --------------010608050801030202000300 Content-Type: text/x-diff; name="add_atoms.patch" Content-Transfer-Encoding: 7bit Content-Disposition: inline; filename="add_atoms.patch" Index: linux-2.6.30.1/drivers/hwmon/coretemp.c =================================================================== --- linux-2.6.30.1.orig/drivers/hwmon/coretemp.c 2009-07-06 17:07:16.458757525 +0200 +++ linux-2.6.30.1/drivers/hwmon/coretemp.c 2009-07-06 18:25:46.934758067 +0200 @@ -157,17 +157,24 @@ /* The 100C is default for both mobile and non mobile CPUs */ int tjmax = 100000; - int ismobile = 1; + int usemsr_ee = 1; int err; u32 eax, edx; /* Early chips have no MSR for TjMax */ if ((c->x86_model == 0xf) && (c->x86_mask < 4)) { - ismobile = 0; + usemsr_ee = 0; } - if ((c->x86_model > 0xe) && (ismobile)) { + /* Atoms seems to have TjMax at 90C */ + + if (c->x86_model == 0x1c) { + usemsr_ee = 0; + tjmax = 90000; + } + + if ((c->x86_model > 0xe) && (usemsr_ee)) { /* Now we can detect the mobile CPU using Intel provided table http://softwarecommunity.intel.com/Wiki/Mobility/720.htm @@ -179,13 +186,13 @@ dev_warn(dev, "Unable to access MSR 0x17, assuming desktop" " CPU\n"); - ismobile = 0; + usemsr_ee = 0; } else if (!(eax & 0x10000000)) { - ismobile = 0; + usemsr_ee = 0; } } - if (ismobile) { + if (usemsr_ee) { err = rdmsr_safe_on_cpu(id, 0xee, &eax, &edx); if (err) { @@ -413,11 +420,11 @@ for_each_online_cpu(i) { struct cpuinfo_x86 *c = &cpu_data(i); - /* check if family 6, models 0xe, 0xf, 0x16, 0x17, 0x1A */ + /* check if family 6, models 0xe, 0xf, 0x16, 0x17, 0x1A, 0x1c */ if ((c->cpuid_level < 0) || (c->x86 != 0x6) || !((c->x86_model == 0xe) || (c->x86_model == 0xf) || (c->x86_model == 0x16) || (c->x86_model == 0x17) || - (c->x86_model == 0x1A))) { + (c->x86_model == 0x1A) || (c->x86_model == 0x1c))) { /* supported CPU not found, but report the unknown family 6 CPU */ Index: linux-2.6.30.1/Documentation/hwmon/coretemp =================================================================== --- linux-2.6.30.1.orig/Documentation/hwmon/coretemp 2009-07-06 18:31:56.262759644 +0200 +++ linux-2.6.30.1/Documentation/hwmon/coretemp 2009-07-06 18:32:20.302461349 +0200 @@ -4,7 +4,7 @@ Supported chips: * All Intel Core family Prefix: 'coretemp' - CPUID: family 0x6, models 0xe, 0xf, 0x16, 0x17 + CPUID: family 0x6, models 0xe, 0xf, 0x16, 0x17, 0x1c (Atom) Datasheet: Intel 64 and IA-32 Architectures Software Developer's Manual Volume 3A: System Programming Guide http://softwarecommunity.intel.com/Wiki/Mobility/720.htm Index: linux-2.6.30.1/drivers/hwmon/Kconfig =================================================================== --- linux-2.6.30.1.orig/drivers/hwmon/Kconfig 2009-07-06 18:32:31.974757310 +0200 +++ linux-2.6.30.1/drivers/hwmon/Kconfig 2009-07-06 18:33:48.566759515 +0200 @@ -402,12 +402,12 @@ will be called gl520sm. config SENSORS_CORETEMP - tristate "Intel Core (2) Duo/Solo temperature sensor" + tristate "Intel Core/Core2/Atom temperature sensor" depends on X86 && EXPERIMENTAL help If you say yes here you get support for the temperature - sensor inside your CPU. Supported all are all known variants - of Intel Core family. + sensor inside your CPU. Most of the family 6 CPUs + are supported. Check documentation/driver for details. config SENSORS_IBMAEM tristate "IBM Active Energy Manager temperature/power sensors and control" --------------010608050801030202000300 Content-Type: application/octet-stream; name="add_atoms.patch.sig" Content-Transfer-Encoding: base64 Content-Disposition: attachment; filename="add_atoms.patch.sig" iEYEABECAAYFAkpSJ5QACgkQ3J9wPJqZRNWdAQCeK7OeV7TIDK9gHEwgCcBqkttXlTwAn1GK 1tJ/Gsb/UiWfuwkNus/NHWVp --------------010608050801030202000300 Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ lm-sensors mailing list lm-sensors@lm-sensors.org http://lists.lm-sensors.org/mailman/listinfo/lm-sensors --------------010608050801030202000300--