From mboxrd@z Thu Jan 1 00:00:00 1970 From: Andre Przywara Subject: [PATCH]: tools/CPUID: remove vendor specific CPUID bits masking Date: Wed, 19 Aug 2009 10:47:03 +0200 Message-ID: <4A8BBC07.1080603@amd.com> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="------------020408050301000502080402" Return-path: List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xensource.com Errors-To: xen-devel-bounces@lists.xensource.com To: Keir Fraser , xen-devel@lists.xensource.com List-Id: xen-devel@lists.xenproject.org --------------020408050301000502080402 Content-Type: text/plain; charset="ISO-8859-1"; format=flowed Content-Transfer-Encoding: 7bit Hi, I don't see the point of removing userspace level CPUID bits in vendor specific paths. Since we base our bits on the host one's, there is no need for masking. This already broke POPCNT support on recent Intel boxes and may break future SSE level implementations on AMD processors. Attached patch removes this leaf 1 check. Signed-off-by: Andre Przywara -- Andre Przywara AMD-Operating System Research Center (OSRC), Dresden, Germany Tel: +49 351 448 3567 12 ----to satisfy European Law for business letters: Advanced Micro Devices GmbH Karl-Hammerschmidt-Str. 34, 85609 Dornach b. Muenchen Geschaeftsfuehrer: Thomas M. McCoy; Giuliano Meroni Sitz: Dornach, Gemeinde Aschheim, Landkreis Muenchen Registergericht Muenchen, HRB Nr. 43632 --------------020408050301000502080402 Content-Type: text/x-patch; name="remove_vendor_specific_CPUID_masking.patch" Content-Transfer-Encoding: 7bit Content-Disposition: inline; filename="remove_vendor_specific_CPUID_masking.patch" diff -r 8b0f1f37e145 tools/libxc/xc_cpuid_x86.c --- a/tools/libxc/xc_cpuid_x86.c Sun Aug 16 08:46:08 2009 +0100 +++ b/tools/libxc/xc_cpuid_x86.c Wed Aug 19 10:39:08 2009 +0200 @@ -71,13 +71,6 @@ { switch ( input[0] ) { - case 0x00000001: - /* Mask Intel-only features. */ - regs[2] &= ~(bitmaskof(X86_FEATURE_SSSE3) | - bitmaskof(X86_FEATURE_SSE4_1) | - bitmaskof(X86_FEATURE_SSE4_2)); - break; - case 0x00000002: case 0x00000004: regs[0] = regs[1] = regs[2] = 0; @@ -126,11 +119,6 @@ { switch ( input[0] ) { - case 0x00000001: - /* Mask AMD-only features. */ - regs[2] &= ~(bitmaskof(X86_FEATURE_POPCNT)); - break; - case 0x00000004: /* * EAX[31:26] is Maximum Cores Per Package (minus one). --------------020408050301000502080402 Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel --------------020408050301000502080402--