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From: Jeremy Fitzhardinge <jeremy@goop.org>
To: "Yang, Xiaowei" <xiaowei.yang@intel.com>
Cc: "xen-devel@lists.xensource.com" <xen-devel@lists.xensource.com>
Subject: Re: [PATCH] Fix memory order issue inside pv spinlock
Date: Wed, 09 Sep 2009 18:50:05 -0700	[thread overview]
Message-ID: <4AA85B4D.8060303@goop.org> (raw)
In-Reply-To: <4AA85937.6080001@intel.com>

On 09/09/09 18:41, Yang, Xiaowei wrote:
> Jeremy Fitzhardinge wrote:
>
>> On 09/09/09 09:30, Yang, Xiaowei wrote:
>>> Jeremy Fitzhardinge wrote:
>>>> On 09/07/09 00:40, Yang, Xiaowei wrote:
>>>>> barrier() can't prevent reads after it not being reordered with older
>>>>> writes to different locates before it. Because of it, I can't
>>>>> bring up
>>>>>> 4 HVM guests on one SMP machine. Use mb() instead.
>>>> Which read is happening too early?  Is it "xl->spinners"?  How does
>>>> it fail?
>>> Yes. If read of xl->spinners happens earlier than write 0 to xl->lock,
>>> notifications to wake up other spinners can be omitted incorrectly,
>>> resulting in others polling indefinitely (because of poll evtchn not
>>> pending) with the lock is uncontended.
>>
>> OK.  And the CPU only guarantees that, without explicit barriers,
>> write-read ordering is only maintained between accesses to the same
>> memory location, not separate locations?
>>
>
> Exactly! For more details please refer to Chapter 8.2 of Intel SDM 3A.

Thanks.  I just submitted both fixes to upstream.

    J

      reply	other threads:[~2009-09-10  1:50 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2009-09-07  7:40 [PATCH] Fix memory order issue inside pv spinlock Yang, Xiaowei
2009-09-08 21:59 ` Jeremy Fitzhardinge
2009-09-09 16:30   ` Yang, Xiaowei
2009-09-09 19:02     ` Jeremy Fitzhardinge
2009-09-10  1:41       ` Yang, Xiaowei
2009-09-10  1:50         ` Jeremy Fitzhardinge [this message]

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