From mboxrd@z Thu Jan 1 00:00:00 1970 From: Anthony Liguori Subject: Re: pci: is reset incomplete? Date: Mon, 14 Sep 2009 12:15:29 -0500 Message-ID: <4AAE7A31.9080600@codemonkey.ws> References: <20090914154822.GA3745@redhat.com> Mime-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Cc: Paul Brook , Avi Kivity , qemu-devel@nongnu.org, Carsten Otte , kvm@vger.kernel.org, Rusty Russell , virtualization@lists.linux-foundation.org, Christian Borntraeger , Gerd Hoffmann To: "Michael S. Tsirkin" Return-path: Received: from mail-yx0-f171.google.com ([209.85.210.171]:40413 "EHLO mail-yx0-f171.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750901AbZINRPl (ORCPT ); Mon, 14 Sep 2009 13:15:41 -0400 Received: by yxe1 with SMTP id 1so4134041yxe.21 for ; Mon, 14 Sep 2009 10:15:44 -0700 (PDT) In-Reply-To: <20090914154822.GA3745@redhat.com> Sender: kvm-owner@vger.kernel.org List-ID: Michael S. Tsirkin wrote: > Hi! > pci bus reset does not seem to clear pci config registers, such as BAR > registers, or memory space enable, of the attached devices: it only > clears the interrupt state. > > This seems wrong, but easy to fix. > I don't think most pci devices reset their config space in their reset callbacks. I would think that making most of the config space (if not the entire) qdev properties would make sense. You can then get reset for free and it's possible for users to tweak things like class codes universally. Regards, Anthony Liguori > Comments? > > From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1MnF9P-0002nO-DE for qemu-devel@nongnu.org; Mon, 14 Sep 2009 13:15:39 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1MnF9K-0002nC-1N for qemu-devel@nongnu.org; Mon, 14 Sep 2009 13:15:38 -0400 Received: from [199.232.76.173] (port=41267 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1MnF9J-0002n9-Rd for qemu-devel@nongnu.org; Mon, 14 Sep 2009 13:15:33 -0400 Received: from mail-yx0-f201.google.com ([209.85.210.201]:41991) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1MnF9J-00072O-IH for qemu-devel@nongnu.org; Mon, 14 Sep 2009 13:15:33 -0400 Received: by yxe39 with SMTP id 39so4091060yxe.18 for ; Mon, 14 Sep 2009 10:15:33 -0700 (PDT) Message-ID: <4AAE7A31.9080600@codemonkey.ws> Date: Mon, 14 Sep 2009 12:15:29 -0500 From: Anthony Liguori MIME-Version: 1.0 References: <20090914154822.GA3745@redhat.com> In-Reply-To: <20090914154822.GA3745@redhat.com> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Subject: [Qemu-devel] Re: pci: is reset incomplete? List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: "Michael S. Tsirkin" Cc: Carsten Otte , Gerd Hoffmann , kvm@vger.kernel.org, Rusty Russell , qemu-devel@nongnu.org, virtualization@lists.linux-foundation.org, Christian Borntraeger , Paul Brook , Avi Kivity Michael S. Tsirkin wrote: > Hi! > pci bus reset does not seem to clear pci config registers, such as BAR > registers, or memory space enable, of the attached devices: it only > clears the interrupt state. > > This seems wrong, but easy to fix. > I don't think most pci devices reset their config space in their reset callbacks. I would think that making most of the config space (if not the entire) qdev properties would make sense. You can then get reset for free and it's possible for users to tweak things like class codes universally. Regards, Anthony Liguori > Comments? > >