From mboxrd@z Thu Jan 1 00:00:00 1970 Message-ID: <4AC66094.8030109@domain.hid> Date: Fri, 02 Oct 2009 22:20:36 +0200 From: Gilles Chanteperdrix MIME-Version: 1.0 References: <4AC2448B.1080500@domain.hid> <1254396765.2703.234.camel@domain.hid> <4AC62883.1080908@domain.hid> <1254505304.2703.347.camel@domain.hid> <4AC63CF0.7090001@domain.hid> <1254511088.2703.367.camel@domain.hid> <4AC65B9C.4010303@domain.hid> In-Reply-To: <4AC65B9C.4010303@domain.hid> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Subject: Re: [Xenomai-core] RFC: 2.5 todo list. List-Id: Xenomai life and development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Philippe Gerum Cc: Patrice Kadionik , Xenomai core Gilles Chanteperdrix wrote: > Philippe Gerum wrote: >> Ok. How many interrupt controllers would be impacted by the PIC mute >> feature? > > Most of the ARM PICs (with their cascaded GPIOs). I have to admit that I > do not keep track of how many arm processors we actually support, but > there's a handful. Or maybe two. We support 9 arm SOCs families. -- Gilles.