Re: [PATCH] Avoid potential hazard on Context register

[Chris Dearman <chris@mips.com>]

Ralf Baechle wrote:
> There is no hazard barrier between writes to c0_context and subsequent
> read accesses.  This is a fairly theoretical hole as c0_context is only
> written on CPU bootup and other, unrelated code will almost certainly
It was actually in the bootup code where I saw the problem, and this 
patch doesn't deal with that case:

>         MTC0            zero, CP0_CONTEXT       # clear context register 
>         PTR_LA          $28, init_thread_union 
>         /* Set the SP after an empty pt_regs.  */ 
>         PTR_LI          sp, _THREAD_SIZE - 32 - PT_SIZE 
>         PTR_ADDU        sp, $28 
>         back_to_back_c0_hazard 
>         set_saved_sp    sp, t0, t1 

The problem I observed is that the Context valuse used by set_saved_sp 
is whatever it inherits from YAMON.

Chris

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