From: "H. Peter Anvin" <hpa@zytor.com>
To: Avi Kivity <avi@redhat.com>
Cc: bifferos <bifferos@yahoo.co.uk>, linux-kernel@vger.kernel.org
Subject: Re: Kexec failure on RDC (and possibly other early x86) platforms
Date: Sun, 06 Dec 2009 16:22:09 -0800 [thread overview]
Message-ID: <4B1C4AB1.7040604@zytor.com> (raw)
In-Reply-To: <4B1BE136.4090005@redhat.com>
On 12/06/2009 08:52 AM, Avi Kivity wrote:
> On 12/06/2009 01:33 PM, bifferos wrote:
>> I've updated the patch to allow Kexec to work on RDC platforms
>> here:
>> http://bifferboard.svn.sourceforge.net/viewvc/bifferboard/slack/kernel/2.6.32/0003-kexec-fix.patch
>>
>>
>> I'm curious as to how one can detect the presence of the CR4
>> register in assembler, as I'm sure it's possible, but I've just
>> #ifndefed out the offending instruction in this patch and it
>> seems to work with this change.
>>
>
> One way is to execute the instruction and trap the #UD exception if it
> is not supported. Not sure whether you have an IDT set up or whether
> your cpu traps on mov cr4.
>
> If your cpu supports cpuid you can test for features that indicate bits
> in cr4 are available, for example VME, DE, PSE, PVI, and PAE. If none
> are available you likely don't have cr4 (and even if you do, it's
> pointless to reset it).
>
In general, I believe, existence of CPUID == existence of CR4.
(There were some late 486's which had CPUID, I believe they also had
CR4.) The first-principles test of catching the trap is more direct,
though. Inside the kernel we have read_cr4_safe() for that.
-hpa
--
H. Peter Anvin, Intel Open Source Technology Center
I work for Intel. I don't speak on their behalf.
prev parent reply other threads:[~2009-12-07 0:22 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-12-06 11:33 Kexec failure on RDC (and possibly other early x86) platforms bifferos
2009-12-06 16:52 ` Avi Kivity
2009-12-07 0:22 ` H. Peter Anvin [this message]
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