All of lore.kernel.org
 help / color / mirror / Atom feed
From: David Daney <ddaney@caviumnetworks.com>
To: Florian Fainelli <florian@openwrt.org>
Cc: linux-mips@linux-mips.org, ralf@linux-mips.org
Subject: Re: [PATCH 3/4] MIPS: deal with larger physical offset
Date: Mon, 04 Jan 2010 09:54:48 -0800	[thread overview]
Message-ID: <4B422B68.3090508@caviumnetworks.com> (raw)
In-Reply-To: <201001032117.26581.florian@openwrt.org>

Florian Fainelli wrote:
> AR7 has a larger physical offset than other MIPS based
> systems and therefore needs to setup handlers differently.
> This version uses uasm instead of the hand crafted assembly
> previously sent. This modification is also required for
> running the kernel in mapped address space.
> 
> Signed-off-by: David Daney <ddaney@caviumnetworks.com>
> Signed-off-by: Eugene Konev <ejka@imfi.kspu.ru>
> Signed-off-by: Florian Fainelli <florian@openwrt.org>
> ---
> diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
> index 308e434..dbf52ab 100644
> --- a/arch/mips/kernel/traps.c
> +++ b/arch/mips/kernel/traps.c
> @@ -51,6 +51,8 @@
>  #include <asm/stacktrace.h>
>  #include <asm/irq.h>
>  
> +#include "../mm/uasm.h"
> +


The first time this came up, it was suggested that uasm.h move to 
asm/uasm.h so that we don't have this ugliness.  I think it is still a 
good idea.

>  extern void check_wait(void);
>  extern asmlinkage void r4k_wait(void);
>  extern asmlinkage void rollback_handle_int(void);
> @@ -1283,9 +1285,18 @@ void *set_except_vector(int n, void *addr)
>  
>  	exception_handlers[n] = handler;
>  	if (n == 0 && cpu_has_divec) {
> -		*(u32 *)(ebase + 0x200) = 0x08000000 |
> -					  (0x03ffffff & (handler >> 2));
> -		local_flush_icache_range(ebase + 0x200, ebase + 0x204);
> +		unsigned long jump_mask = ~((1 << 28) - 1);
> +		u32 *buf = (u32 *)(ebase + 0x200);
> +		unsigned int k0 = 26;
> +		if((handler & jump_mask) == ((ebase + 0x200) & jump_mask)) {
> +			uasm_i_j(&buf, handler & jump_mask);
> +			uasm_i_nop(&buf);
> +		} else {
> +			UASM_i_LA(&buf, k0, handler);
> +			uasm_i_jr(&buf, k0);
> +			uasm_i_nop(&buf);
> +		}
> +		local_flush_icache_range(ebase + 0x200, (unsigned long)buf);


I would expect that this causes section mismatch build warnings.

You may have to make this function __init or __cpu_init (and change 
trap_init() to __cpu_init too).

You should also fix the comment, as after the patch it is no longer 
accurate.

>  	}
>  	return (void *)old_handler;
>  }
> 
> 

      reply	other threads:[~2010-01-04 17:55 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2010-01-03 20:17 [PATCH 3/4] MIPS: deal with larger physical offset Florian Fainelli
2010-01-04 17:54 ` David Daney [this message]

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=4B422B68.3090508@caviumnetworks.com \
    --to=ddaney@caviumnetworks.com \
    --cc=florian@openwrt.org \
    --cc=linux-mips@linux-mips.org \
    --cc=ralf@linux-mips.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.