From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1NUNRA-0006sY-0K for qemu-devel@nongnu.org; Mon, 11 Jan 2010 11:48:16 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1NUNR9-0006rR-04 for qemu-devel@nongnu.org; Mon, 11 Jan 2010 11:48:15 -0500 Received: from [199.232.76.173] (port=34865 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1NUNR8-0006rM-SQ for qemu-devel@nongnu.org; Mon, 11 Jan 2010 11:48:14 -0500 Received: from are.twiddle.net ([75.149.56.221]:42571) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1NUNR8-00084m-6z for qemu-devel@nongnu.org; Mon, 11 Jan 2010 11:48:14 -0500 Message-ID: <4B4B564A.1000207@twiddle.net> Date: Mon, 11 Jan 2010 08:48:10 -0800 From: Richard Henderson MIME-Version: 1.0 Subject: Re: [Qemu-devel] mulu2 not implemented for tcg target sparc References: <761ea48b1001101250s75baf7e7vc087c43d8ad30b2c@mail.gmail.com> In-Reply-To: Content-Type: multipart/mixed; boundary="------------050504080302010801020507" List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Palle Lyckegaard Cc: Blue Swirl , Laurent Desnogues , qemu-devel@nongnu.org This is a multi-part message in MIME format. --------------050504080302010801020507 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit On 01/10/2010 01:17 PM, Palle Lyckegaard wrote: > On Sun, 10 Jan 2010, Blue Swirl wrote: > >>>> >>>> Is it needed somewhere? >>> > > I was trying to run qemu-system-mips with a NetBSD malta kernel that > generates a MIPS mult operation. Tracing the code through tcg points at > a missing mulu2 opreration for sparc. > > >> It will be generated for instance for some muls when the target >> > is i386 (not even x86_64) on a 32-bit host. >> >> In that case mulu2 support would be useful for Sparc32 host too. >> Palle, are you planning to dig into this? > > Yes I will try even if my tcg and SPARC assembly skills and very limited > (so far...) Try this. You're also missing double-word addition and subtraction. r~ --------------050504080302010801020507 Content-Type: text/plain; name="z" Content-Transfer-Encoding: 7bit Content-Disposition: attachment; filename="z" diff --git a/tcg/sparc/tcg-target.c b/tcg/sparc/tcg-target.c index 8f094e5..003f084 100644 --- a/tcg/sparc/tcg-target.c +++ b/tcg/sparc/tcg-target.c @@ -215,6 +215,7 @@ static inline int tcg_target_const_match(tcg_target_long val, #define BA (INSN_OP(0) | INSN_COND(COND_A, 0) | INSN_OP2(0x2)) #define ARITH_ADD (INSN_OP(2) | INSN_OP3(0x00)) +#define ARITH_ADDCC (INSN_OP(2) | INSN_OP3(0x10)) #define ARITH_AND (INSN_OP(2) | INSN_OP3(0x01)) #define ARITH_OR (INSN_OP(2) | INSN_OP3(0x02)) #define ARITH_ORCC (INSN_OP(2) | INSN_OP3(0x12)) @@ -238,6 +239,7 @@ static inline int tcg_target_const_match(tcg_target_long val, #define SHIFT_SRLX (INSN_OP(2) | INSN_OP3(0x26) | (1 << 12)) #define SHIFT_SRAX (INSN_OP(2) | INSN_OP3(0x27) | (1 << 12)) +#define RDY (INSN_OP(2) | INSN_OP3(0x28) | INSN_RS1(0)) #define WRY (INSN_OP(2) | INSN_OP3(0x30)) #define JMPL (INSN_OP(2) | INSN_OP3(0x38)) #define SAVE (INSN_OP(2) | INSN_OP3(0x3c)) @@ -403,6 +405,11 @@ static inline void tcg_out_sety(TCGContext *s, tcg_target_long val) fprintf(stderr, "unimplemented sety %ld\n", (long)val); } +static inline void tcg_out_rdy(TCGContext *s, int rd) +{ + tcg_out32(s, RDY | INSN_RD(rd)); +} + static inline void tcg_out_addi(TCGContext *s, int reg, tcg_target_long val) { if (val != 0) { @@ -1128,6 +1135,38 @@ static inline void tcg_out_op(TCGContext *s, int opc, const TCGArg *args, args[2], const_args[2], args[3], const_args[3], args[5]); break; + case INDEX_op_add2_i32: + if (const_args[4]) { + tcg_out_arithi(s, args[0], args[2], args[4], ARITH_ADDCC); + } else { + tcg_out_arith(s, args[0], args[2], args[4], ARITH_ADDCC); + } + if (const_args[5]) { + tcg_out_arithi(s, args[1], args[3], args[5], ARITH_ADDX); + } else { + tcg_out_arithi(s, args[1], args[3], args[5], ARITH_ADDX); + } + break; + case INDEX_op_sub2_i32: + if (const_args[4]) { + tcg_out_arithi(s, args[0], args[2], args[4], ARITH_SUBCC); + } else { + tcg_out_arith(s, args[0], args[2], args[4], ARITH_SUBCC); + } + if (const_args[5]) { + tcg_out_arithi(s, args[1], args[3], args[5], ARITH_SUBX); + } else { + tcg_out_arithi(s, args[1], args[3], args[5], ARITH_SUBX); + } + break; + case INDEX_op_mulu2_i32: + if (const_args[3]) { + tcg_out_arithi(s, args[0], args[2], args[3], ARITH_UMUL); + } else { + tcg_out_arith(s, args[0], args[2], args[3], ARITH_UMUL); + } + tcg_out_rdy(s, args[1]); + break; #endif case INDEX_op_qemu_ld8u: --------------050504080302010801020507--