[U-Boot] [PATCH 7/9 V3] prepare joining at91rm9200 into at91

[Tom <Tom.Rix@windriver.com>]

Jens Scharsig wrote:
> * prepare joining at91 and at91rm9200 
> * please read README.soc-at91 for details
> 

It looks like a lot of these files are copies.
Please explain in the commit log what you are
doing. Such as

cpu/arm920t/at91/timer.c is a copy of ..
These are the parts changed.
1.
2.

It is hard to see what has changed
I will try below..

> Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de>
> ---
>  cpu/arm920t/at91/Makefile              |   47 +++++++++
>  cpu/arm920t/at91/lowlevel_init.S       |  177 ++++++++++++++++++++++++++++++++
not much change vs rm9200

>  cpu/arm920t/at91/reset.c               |   59 +++++++++++
register access changes

>  cpu/arm920t/at91/timer.c               |  163 +++++++++++++++++++++++++++++

white space changes
register access changes

>  cpu/arm920t/cpu.c                      |    4 +
>  doc/README.at91-soc                    |   24 ++++-
>  include/asm-arm/arch-at91/at91_mc.h    |   89 ++++++++++++++++
>  include/asm-arm/arch-at91/at91_st.h    |   48 +++++++++
>  include/asm-arm/arch-at91/at91_tc.h    |   79 ++++++++++++++
>  include/asm-arm/arch-at91/at91rm9200.h |  135 ++++++++++++++++++++++++
>  include/asm-arm/arch-at91/hardware.h   |    2 +-
>  11 files changed, 825 insertions(+), 2 deletions(-)
>  create mode 100644 cpu/arm920t/at91/Makefile
>  create mode 100644 cpu/arm920t/at91/lowlevel_init.S
>  create mode 100644 cpu/arm920t/at91/reset.c
>  create mode 100644 cpu/arm920t/at91/timer.c
>  create mode 100644 include/asm-arm/arch-at91/at91_mc.h
>  create mode 100644 include/asm-arm/arch-at91/at91_st.h
>  create mode 100644 include/asm-arm/arch-at91/at91_tc.h
>  create mode 100644 include/asm-arm/arch-at91/at91rm9200.h
> 
> diff --git a/cpu/arm920t/at91/Makefile b/cpu/arm920t/at91/Makefile
> new file mode 100644
> index 0000000..6e683f6
> --- /dev/null
> +++ b/cpu/arm920t/at91/Makefile
> @@ -0,0 +1,47 @@
> +#
> +# (C) Copyright 2000-2006
> +# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
> +#
> +# See file CREDITS for list of people who contributed to this
> +# project.
> +#
> +# This program is free software; you can redistribute it and/or
> +# modify it under the terms of the GNU General Public License as
> +# published by the Free Software Foundation; either version 2 of
> +# the License, or (at your option) any later version.
> +#
> +# This program is distributed in the hope that it will be useful,
> +# but WITHOUT ANY WARRANTY; without even the implied warranty of
> +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> +# GNU General Public License for more details.
> +#
> +# You should have received a copy of the GNU General Public License
> +# along with this program; if not, write to the Free Software
> +# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> +# MA 02111-1307 USA
> +#
> +
> +include $(TOPDIR)/config.mk
> +
> +LIB	= $(obj)lib$(SOC).a
> +
> +SOBJS	+= lowlevel_init.o
> +COBJS	+= reset.o
> +COBJS	+= timer.o
> +
> +SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
> +OBJS	:= $(addprefix $(obj),$(SOBJS) $(COBJS))
> +
> +all:	$(obj).depend $(LIB)
> +
> +$(LIB):	$(OBJS)
> +	$(AR) $(ARFLAGS) $@ $(OBJS)
> +
> +#########################################################################
> +
> +# defines $(obj).depend target
> +include $(SRCTREE)/rules.mk
> +
> +sinclude $(obj).depend
> +
> +#########################################################################
> diff --git a/cpu/arm920t/at91/lowlevel_init.S b/cpu/arm920t/at91/lowlevel_init.S
> new file mode 100644
> index 0000000..ecd3d7e
> --- /dev/null
> +++ b/cpu/arm920t/at91/lowlevel_init.S
> @@ -0,0 +1,177 @@
> +/*
> + * Memory Setup stuff - taken from blob memsetup.S

Many copyrights like this
Please check

> + *
> + * Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw at its.tudelft.nl) and
> + *		       Jan-Derk Bakker (J.D.Bakker at its.tudelft.nl)
> + *
> + * Modified for the at91rm9200dk board by

Maybe change to
'Based on the at91rm9200dk board'
'This is the original copyright"

> + * (C) Copyright 2004
> + * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
ws
extra tab
Apply globally

> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +#include <config.h>
> +#include <version.h>
> +
> +#ifndef CONFIG_SKIP_LOWLEVEL_INIT
> +
> +#define AT91_PMC_MOR		0xFFFFFC20 	/* Main oscillator register */

ws
extra space after '..20 '
There are a number of other similar small ws errors.
Please remove the unneeded leading or trailing spaces.

> +#define AT91_PMC_PLLAR		0xFFFFFC28
> +#define AT91_PMC_PLLBR		0xFFFFFC2C
> +#define AT91_PMC_MCKR		0xFFFFFC30
> +
> +#define AT91_PIOC_ASR		0xFFFFF870
> +#define AT91_PIOC_BSR		0xFFFFF874
> +#define AT91_PIOC_PDR		0xFFFFF804
> +
> +#define AT91_MC_EBI_CSA		0xFFFFFF60
> +#define AT91_MC_EBI_CFG		0xFFFFFF64
> +#define AT91_MC_SMC_CSR0	0xFFFFFF70
> +
> +#define AT91_MC_SDRAMC_MR	0xFFFFFF90
> +#define AT91_MC_SDRAMC_TR	0xFFFFFF94
> +#define AT91_MC_SDRAMC_CR	0xFFFFFF98
> +
> +_MTEXT_BASE:
> +#undef START_FROM_MEM
> +#ifdef START_FROM_MEM
> +	.word	TEXT_BASE-PHYS_FLASH_1
> +#else
> +	.word	TEXT_BASE
> +#endif
> +
> +.globl lowlevel_init
> +lowlevel_init:
> +	ldr     r1, =AT91_PMC_MOR

This was the only really change vs rm9200

> +	/* Main oscillator Enable register */
> +#ifdef CONFIG_SYS_USE_MAIN_OSCILLATOR
> +	ldr     r0, =0x0000FF01		/* Enable main oscillator */
> +#else
> +	ldr     r0, =0x0000FF00		/* Disable main oscillator */
> +#endif
> +	str     r0, [r1] /*AT91C_CKGR_MOR] */
> +	/* Add loop to compensate Main Oscillator startup time */
> +	ldr     r0, =0x00000010
> +LoopOsc:
> +	subs    r0, r0, #1
> +	bhi     LoopOsc
> +
> +	/* memory control configuration */
> +	/* this isn't very elegant, but	 what the heck */
> +	ldr	r0, =SMRDATA
> +	ldr	r1, _MTEXT_BASE
> +	sub	r0, r0, r1
> +	add	r2, r0, #80
> +0:

change to logical labels
apply globally

> +	/* the address */
> +	ldr	r1, [r0], #4
> +	/* the value */
> +	ldr	r3, [r0], #4
> +	str	r3, [r1]
> +	cmp	r2, r0
> +	bne	0b
> +	/* delay - this is all done by guess */
> +	ldr	r0, =0x00010000
> +	/* (vs reading PMC_SR for LOCKA, LOCKB ... or MOSCS earlier) */
> +1:
> +	subs	r0, r0, #1
> +	bhi	1b
> +	ldr	r0, =SMRDATA1
> +	ldr	r1, _MTEXT_BASE
> +	sub	r0, r0, r1
> +	add	r2, r0, #176
> +2:
> +	/* the address */
> +	ldr	r1, [r0], #4
> +	/* the value */
> +	ldr	r3, [r0], #4
> +	str	r3, [r1]
> +	cmp	r2, r0
> +	bne	2b
> +
> +	/* switch from FastBus to Asynchronous clock mode */
> +	mrc	p15, 0, r0, c1, c0, 0
> +	orr	r0, r0, #0xC0000000	@ set bit 31 (iA) and 30 (nF)

should change to #define

> +	mcr	p15, 0, r0, c1, c0, 0
> +
> +	/* everything is fine now */
> +	mov	pc, lr
> +
> +	.ltorg
> +
> +SMRDATA:

vs at91rm9200
The change is the slight changes in the names of the #defines
below.  As with other places, do not changes variables
names this hides real changes and duplicates code.

> +	.word AT91_MC_EBI_CFG
> +	.word CONFIG_SYS_EBI_CFGR_VAL
> +	.word AT91_MC_SMC_CSR0
> +	.word CONFIG_SYS_SMC_CSR0_VAL
> +	.word AT91_PMC_PLLAR
> +	.word CONFIG_SYS_PLLAR_VAL
> +	.word AT91_PMC_PLLBR
> +	.word CONFIG_SYS_PLLBR_VAL
> +	.word AT91_PMC_MCKR
> +	.word CONFIG_SYS_MCKR_VAL
> +	/* here there's a delay */
> +SMRDATA1:
> +	.word AT91_PIOC_ASR
> +	.word CONFIG_SYS_PIOC_ASR_VAL
> +	.word AT91_PIOC_BSR
> +	.word CONFIG_SYS_PIOC_BSR_VAL
> +	.word AT91_PIOC_PDR
> +	.word CONFIG_SYS_PIOC_PDR_VAL
> +	.word AT91_MC_EBI_CSA
> +	.word CONFIG_SYS_EBI_CSA_VAL
> +	.word AT91_MC_SDRAMC_CR
> +	.word CONFIG_SYS_SDRC_CR_VAL
> +	.word AT91_MC_SDRAMC_MR
> +	.word CONFIG_SYS_SDRC_MR_VAL
> +	.word CONFIG_SYS_SDRAM
> +	.word CONFIG_SYS_SDRAM_VAL
> +	.word AT91_MC_SDRAMC_MR
> +	.word CONFIG_SYS_SDRC_MR_VAL1
> +	.word CONFIG_SYS_SDRAM
> +	.word CONFIG_SYS_SDRAM_VAL
> +	.word CONFIG_SYS_SDRAM
> +	.word CONFIG_SYS_SDRAM_VAL
> +	.word CONFIG_SYS_SDRAM
> +	.word CONFIG_SYS_SDRAM_VAL
> +	.word CONFIG_SYS_SDRAM
> +	.word CONFIG_SYS_SDRAM_VAL
> +	.word CONFIG_SYS_SDRAM
> +	.word CONFIG_SYS_SDRAM_VAL
> +	.word CONFIG_SYS_SDRAM
> +	.word CONFIG_SYS_SDRAM_VAL
> +	.word CONFIG_SYS_SDRAM
> +	.word CONFIG_SYS_SDRAM_VAL
> +	.word CONFIG_SYS_SDRAM
> +	.word CONFIG_SYS_SDRAM_VAL
> +	.word AT91_MC_SDRAMC_MR
> +	.word CONFIG_SYS_SDRC_MR_VAL2
> +	.word CONFIG_SYS_SDRAM1
> +	.word CONFIG_SYS_SDRAM_VAL
> +	.word AT91_MC_SDRAMC_TR
> +	.word CONFIG_SYS_SDRC_TR_VAL
> +	.word CONFIG_SYS_SDRAM
> +	.word CONFIG_SYS_SDRAM_VAL
> +	.word AT91_MC_SDRAMC_MR
> +	.word CONFIG_SYS_SDRC_MR_VAL3
> +	.word CONFIG_SYS_SDRAM
> +	.word CONFIG_SYS_SDRAM_VAL
> +	/* SMRDATA1 is 176 bytes long */
> +#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
> diff --git a/cpu/arm920t/at91/reset.c b/cpu/arm920t/at91/reset.c
> new file mode 100644
> index 0000000..d38c53b
> --- /dev/null
> +++ b/cpu/arm920t/at91/reset.c
> @@ -0,0 +1,59 @@
> +/*
> + * (C) Copyright 2002
> + * Lineo, Inc. <www.lineo.com>
> + * Bernhard Kuhn <bkuhn@lineo.com>
> + *
> + * (C) Copyright 2002
> + * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
> + * Marius Groeger <mgroeger@sysgo.de>
> + *
> + * (C) Copyright 2002
> + * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
> + * Alex Zuepke <azu@sysgo.de>
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +#include <common.h>
> +#include <asm/io.h>
> +#include <asm/arch/hardware.h>
> +#include <asm/arch/at91_st.h>
> +
> +void board_reset(void) __attribute__((__weak__));
> +
> +void reset_cpu(ulong ignored)
> +{
> +	at91_st_t *st = (at91_st_t *) AT91_ST_BASE;
> +#if defined(CONFIG_AT91RM9200_USART) || defined(CONFIG_AT91_USART)

I could not find where CONFIG_AT91_USART is defined
Remove.

> +	/*shutdown the console to avoid strange chars during reset */
> +	serial_exit();
> +#endif
> +
> +	if (board_reset)
> +		board_reset();
> +
> +	/* Reset the cpu by setting up the watchdog timer */
> +	writel(AT91_ST_WDMR_RSTEN | AT91_ST_WDMR_EXTEN | AT91_ST_WDMR_WDV(2),
> +		&st->wdmr);
> +	writel(AT91_ST_CR_WDRST, &st->cr);
> +	/* and let him time out */

'let it timeout'

> +	while (1)
> +		;
> +	/* Never reached */
> +}
> diff --git a/cpu/arm920t/at91/timer.c b/cpu/arm920t/at91/timer.c
> new file mode 100644
> index 0000000..91377d4
> --- /dev/null
> +++ b/cpu/arm920t/at91/timer.c
> @@ -0,0 +1,163 @@
> +/*
> + * (C) Copyright 2002
> + * Lineo, Inc. <www.lineo.com>
> + * Bernhard Kuhn <bkuhn@lineo.com>
> + *
> + * (C) Copyright 2002
> + * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
> + * Marius Groeger <mgroeger@sysgo.de>
> + *
> + * (C) Copyright 2002
> + * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
> + * Alex Zuepke <azu@sysgo.de>
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +#include <common.h>
> +
> +#include <asm/io.h>
> +#include <asm/hardware.h>
> +#include <asm/arch/at91_tc.h>
> +#include <asm/arch/at91_pmc.h>
> +
> +/* the number of clocks per CONFIG_SYS_HZ */
> +#define TIMER_LOAD_VAL (CONFIG_SYS_HZ_CLOCK/CONFIG_SYS_HZ)
> +
> +static u32 timestamp;
> +static u32 lastinc;
> +
> +int timer_init(void)
> +{
> +	at91_tc_t *tc = (at91_tc_t *) AT91_TC_BASE;
> +	at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
> +
> +	/* enables TC1.0 clock */
> +	writel(1 << AT91_ID_TC0, &pmc->pcer);	/* enable clock */
> +
> +	writel(0, &tc->bcr);
> +	writel(AT91_TC_BMR_TC0XC0S_NONE | AT91_TC_BMR_TC1XC1S_NONE |
> +		AT91_TC_BMR_TC2XC2S_NONE , &tc->bmr);

rm9200 had another bit
<       tmr->TC_CCR = AT91C_TC_CLKDIS;
< #define AT91C_TC_CMR_CPCTRG (1 << 14)
<       /* set to MCLK/2 and restart the timer when the vlaue in TC_RC is reached */
<       tmr->TC_CMR = AT91C_TC_TIMER_DIV1_CLOCK | AT91C_TC_CMR_CPCTRG;
This ok?

> +
> +	writel(AT91_TC_CCR_CLKDIS, &tc->tc[0].ccr);
> +	/* set to MCLK/2 and restart the timer
> +	when the value in TC_RC is reached */
> +	writel(AT91_TC_CMR_TCCLKS_CLOCK1 | AT91_TC_CMR_CPCTRG, &tc->tc[0].cmr);
> +
> +	writel(0xFFFFFFFF, &tc->tc[0].idr); /* disable interupts */
> +	writel(TIMER_LOAD_VAL, &tc->tc[0].rc);
> +
> +	writel(AT91_TC_CCR_SWTRG | AT91_TC_CCR_CLKEN, &tc->tc[0].ccr);
> +	lastinc = 0;
> +	timestamp = 0;
> +
> +	return 0;
> +}
> +
> +/*
> + * timer without interrupts
> + */
> +
> +void reset_timer(void)
> +{
> +	reset_timer_masked();
> +}
> +
> +ulong get_timer(ulong base)
> +{
> +	return get_timer_masked() - base;
> +}
> +
> +void set_timer(ulong t)
> +{
> +	timestamp = t;
> +}
> +
> +void __udelay(unsigned long usec)
> +{
> +	udelay_masked(usec);
> +}
> +
> +void reset_timer_masked(void)
> +{
> +	/* reset time */
> +	at91_tc_t *tc = (at91_tc_t *) AT91_TC_BASE;
> +	lastinc = readl(&tc->tc[0].cv) & 0x0000ffff;
> +	timestamp = 0;

rm9200 did not zero out the top bits
Is this needed ?

> +}
> +
> +ulong get_timer_raw(void)
> +{
> +	at91_tc_t *tc = (at91_tc_t *) AT91_TC_BASE;
> +	u32 now;
> +
> +	now = readl(&tc->tc[0].cv) & 0x0000ffff;
> +
> +	if (now >= lastinc) {
> +		/* normal mode */
> +		timestamp += now - lastinc;
> +	} else {
> +		/* we have an overflow ... */
> +		timestamp += now + TIMER_LOAD_VAL - lastinc;
> +	}
> +	lastinc = now;
> +
> +	return timestamp;
> +}
> +
> +ulong get_timer_masked(void)
> +{
> +	return get_timer_raw()/TIMER_LOAD_VAL;
> +}
> +
> +void udelay_masked(unsigned long usec)
> +{
> +	u32 tmo;
> +	u32 endtime;
> +	signed long diff;
> +
> +	tmo = CONFIG_SYS_HZ_CLOCK / 1000;
> +	tmo *= usec;
> +	tmo /= 1000;
> +
> +	endtime = get_timer_raw() + tmo;
> +
> +	do {
> +		u32 now = get_timer_raw();
> +		diff = endtime - now;
> +	} while (diff >= 0);
> +}
> +
> +/*
> + * This function is derived from PowerPC code (read timebase as long long).
> + * On ARM it just returns the timer value.
> + */
> +unsigned long long get_ticks(void)
> +{
> +	return get_timer(0);
> +}
> +
> +/*
> + * This function is derived from PowerPC code (timebase clock frequency).
> + * On ARM it returns the number of timer ticks per second.
> + */
> +ulong get_tbclk(void)
> +{
> +	return CONFIG_SYS_HZ;
> +}
> diff --git a/cpu/arm920t/cpu.c b/cpu/arm920t/cpu.c
> index 34adb11..be82c87 100644
> --- a/cpu/arm920t/cpu.c
> +++ b/cpu/arm920t/cpu.c
> @@ -33,6 +33,10 @@
>  #include <command.h>
>  #include <asm/system.h>
>  
> +#ifdef CONFIG_AT91_LEGACY
> +#warning Your board is using legacy AT91RM9200 SoC access. Please update!
> +#endif
> +
>  static void cache_flush(void);
>  
>  int cleanup_before_linux (void)
> diff --git a/doc/README.at91-soc b/doc/README.at91-soc
> index 063016e..29234b1 100644
> --- a/doc/README.at91-soc
> +++ b/doc/README.at91-soc
> @@ -37,6 +37,28 @@ The Way
>  1. add's the new temporary CONFIG_AT91_LEGACY to all board configs
>     that not converted to new SoC access
>  2. add new structures for SoC access
> -3. Convert arch, driver and boards file zu new SoC
> +3. Convert arch, driver and boards file to new SoC
>  4. remove legacy code, if all boards and drives are ready
>  
> + Join AT91 and AT91RM9200 SoC
> +==============================
> +
> +Approximately 95 percent of AT91 and AT91RM9200 SoC parts are the same.
> +So, we should use the chance, to join both archs togetter.
> +
> +To do this follow step needed:
> +
> +1. change Makefile
> +	@$(MKCONFIG) $(@:_config=) arm arm920t board vendor at91rm9200
> +  to
> +	@$(MKCONFIG) $(@:_config=) arm arm920t board vendor at91
> +2. remove CONFIG_AT91_LEGACY in board config
> +3. convert boards file to new SoC access
> +4. convert or change drivers
> +
> +To support the joining process, a new SoC dir (at91) has been adding to
> +arm920t arch directory. This directory contains files like at91rm9200 dir, but
> +uses the new c structure Soc access. The advantage of this is, we don't merge
> +old Soc access code and new code while the board are not converted.
> +Finally we can delete the whole at91rm9200 dir, if all board support the
> +new AT91-SoC access.
> diff --git a/include/asm-arm/arch-at91/at91_mc.h b/include/asm-arm/arch-at91/at91_mc.h
> new file mode 100644
> index 0000000..19d9755
> --- /dev/null
> +++ b/include/asm-arm/arch-at91/at91_mc.h
> @@ -0,0 +1,89 @@
> +/*
> + * Memory Setup stuff - taken from blob memsetup.S
> + *
> + * Copyright (C) 2009 Jens Scharsig (js_at_ng at scharsoft.de)
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +#ifndef AT91_MC_H
> +#define AT91_MC_H
> +
> +typedef struct at91_ebi {
> +	u32 	csa;		/* 0x00 Chip Select Assignment Register */
> +	u32	cfgr;		/* 0x04 Configuration Register */
> +	u32	reserved[2];
> +} at91_ebi_t;
> +
> +#define AT91_EBI_CSA_CS0A	0x0001
> +#define AT91_EBI_CSA_CS1A	0x0002
> +
> +#define AT91_EBI_CSA_CS3A	0x0008
> +#define AT91_EBI_CSA_CS4A	0x0010
> +
> +typedef struct	at91_sdramc {
> +	u32	mr; 	/* 0x00 SDRAMC Mode Register */
> +	u32	tr; 	/* 0x04 SDRAMC Refresh Timer Register */
> +	u32	cr; 	/* 0x08 SDRAMC Configuration Register */
> +	u32	ssr; 	/* 0x0C SDRAMC Self Refresh Register */
> +	u32	lpr; 	/* 0x10 SDRAMC Low Power Register */
> +	u32	ier; 	/* 0x14 SDRAMC Interrupt Enable Register */
> +	u32	idr; 	/* 0x18 SDRAMC Interrupt Disable Register */
> +	u32	imr; 	/* 0x1C SDRAMC Interrupt Mask Register */
> +	u32	icr; 	/* 0x20 SDRAMC Interrupt Status Register */
> +	u32	reserved[3];
> +} at91_sdramc_t;
> +
> +typedef struct	at91_smc {
> +	u32	csr[8]; 	/* 0x00 SDRAMC Mode Register */
> +} at91_smc_t;
> +
> +#define AT91_SMC_CSR_RWHOLD(x)		((x & 0x7) << 28)
> +#define AT91_SMC_CSR_RWSETUP(x)		((x & 0x7) << 24)
> +#define AT91_SMC_CSR_ACSS_STANDARD	0x00000000
> +#define AT91_SMC_CSR_ACSS_1CYCLE	0x00010000
> +#define AT91_SMC_CSR_ACSS_2CYCLE	0x00020000
> +#define AT91_SMC_CSR_ACSS_3CYCLE	0x00030000
> +#define AT91_SMC_CSR_DRP		0x00008000
> +#define AT91_SMC_CSR_DBW_8		0x00004000
> +#define AT91_SMC_CSR_DBW_16		0x00002000
> +#define AT91_SMC_CSR_BAT_8		0x00000000
> +#define AT91_SMC_CSR_BAT_16		0x00001000
> +#define AT91_SMC_CSR_TDF(x)		((x & 0xF) << 8)
> +#define AT91_SMC_CSR_WSEN		0x00000080
> +#define AT91_SMC_CSR_NWS(x)		(x & 0x7F)
> +
> +typedef struct	at91_bfc {
> +	u32	mr; 	/* 0x00 SDRAMC Mode Register */
> +} at91_bfc_t;
> +
> +typedef struct at91_mc {
> +	u32		rcr;		/* 0x00 MC Remap Control Register */
> +	u32		asr;		/* 0x04 MC Abort Status Register */
> +	u32		aasr;		/* 0x08 MC Abort Address Status Reg */
> +	u32		mpr;		/* 0x0C MC Master Priority Register */
> +	u32		reserved1[20];	/* 0x10-0x5C */
> +	at91_ebi_t	ebi;		/* 0x60	- 0x6C EBI */
> +	at91_smc_t	smc;		/* 0x70 - 0x8C SMC User Interface */
> +	at91_sdramc_t	sdramc;		/* 0x90 - 0xBC SDRAMC User Interface */
> +	at91_bfc_t	bfc;		/* 0xC0 BFC User Interface */

You may want to add '__attribute__ packed' around your structures
to be save wrt the compiler adding extra spaces in it.
This should be applied globally

> +	u32		reserved2[15];
> +} at91_mc_t;
> +
> +#endif
> diff --git a/include/asm-arm/arch-at91/at91_st.h b/include/asm-arm/arch-at91/at91_st.h
> new file mode 100644
> index 0000000..a5fcfd2
> --- /dev/null
> +++ b/include/asm-arm/arch-at91/at91_st.h
> @@ -0,0 +1,48 @@
> +/*
> + * Memory Setup stuff - taken from blob memsetup.S
> + *
> + * Copyright (C) 2009 Jens Scharsig (js_at_ng at scharsoft.de)
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +#ifndef AT91_ST_H
> +#define AT91_ST_H
> +
> +typedef struct at91_st {
> +
> +	u32	cr;
> +	u32	pimr;
> +	u32	wdmr;
> +	u32	rtmr;
> +	u32	sr;
> +	u32	ier;
> +	u32	idr;
> +	u32	imr;
> +	u32	rtar;
> +	u32	crtr;
> +} at91_st_t;
> +
> +#define AT91_ST_CR_WDRST	1
> +
> +#define AT91_ST_WDMR_WDV(x)	(x & 0xFFFF)
> +#define AT91_ST_WDMR_RSTEN	0x00010000
> +#define AT91_ST_WDMR_EXTEN 	0x00020000
> +
> +#endif
> diff --git a/include/asm-arm/arch-at91/at91_tc.h b/include/asm-arm/arch-at91/at91_tc.h
> new file mode 100644
> index 0000000..b40cd20
> --- /dev/null
> +++ b/include/asm-arm/arch-at91/at91_tc.h
> @@ -0,0 +1,79 @@
> +/*
> + * Memory Setup stuff - taken from blob memsetup.S
> + *
> + * Copyright (C) 2009 Jens Scharsig (js_at_ng at scharsoft.de)
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +#ifndef AT91_TC_H
> +#define AT91_TC_H
> +
> +typedef struct at91_tcc {
> +	u32		ccr;	/* 0x00 Channel Control Register */
> +	u32		cmr;	/* 0x04 Channel Mode Register */
> +	u32		reserved1[2];
> +	u32		cv;	/* 0x10 Counter Value */
> +	u32		ra;	/* 0x14 Register A */
> +	u32		rb;	/* 0x18 Register B */
> +	u32		rc;	/* 0x1C Register C */
> +	u32		sr;	/* 0x20 Status Register */
> +	u32		ier;	/* 0x24 Interrupt Enable Register */
> +	u32		idr;	/* 0x28 Interrupt Disable Register */
> +	u32		imr;	/* 0x2C Interrupt Mask Register */
> +	u32		reserved3[4];
> +} at91_tcc_t;
> +
> +#define AT91_TC_CCR_CLKEN		0x00000001
> +#define AT91_TC_CCR_CLKDIS		0x00000002
> +#define AT91_TC_CCR_SWTRG		0x00000004
> +
> +#define AT91_TC_CMR_CPCTRG		0x00004000
> +
> +#define AT91_TC_CMR_TCCLKS_CLOCK1	0x00000000
> +#define AT91_TC_CMR_TCCLKS_CLOCK2	0x00000001
> +#define AT91_TC_CMR_TCCLKS_CLOCK3	0x00000002
> +#define AT91_TC_CMR_TCCLKS_CLOCK4	0x00000003
> +#define AT91_TC_CMR_TCCLKS_CLOCK5	0x00000004
> +#define AT91_TC_CMR_TCCLKS_XC0		0x00000005
> +#define AT91_TC_CMR_TCCLKS_XC1		0x00000006
> +#define AT91_TC_CMR_TCCLKS_XC2		0x00000007
> +
> +typedef struct at91_tc {
> +	at91_tcc_t	tc[3];	/* 0x00 TC Channel 0-2 */
> +	u32		bcr;	/* 0xC0 TC Block Control Register */
> +	u32		bmr;	/* 0xC4 TC Block Mode Register */
> +} at91_tc_t;
> +
> +#define AT91_TC_BMR_TC0XC0S_TCLK0	0x00000000
> +#define AT91_TC_BMR_TC0XC0S_NONE	0x00000001
> +#define AT91_TC_BMR_TC0XC0S_TIOA1	0x00000002
> +#define AT91_TC_BMR_TC0XC0S_TIOA2	0x00000003
> +
> +#define AT91_TC_BMR_TC1XC1S_TCLK1	0x00000000
> +#define AT91_TC_BMR_TC1XC1S_NONE	0x00000004
> +#define AT91_TC_BMR_TC1XC1S_TIOA0	0x00000008
> +#define AT91_TC_BMR_TC1XC1S_TIOA2	0x0000000C
> +
> +#define AT91_TC_BMR_TC2XC2S_TCLK2	0x00000000
> +#define AT91_TC_BMR_TC2XC2S_NONE	0x00000010
> +#define AT91_TC_BMR_TC2XC2S_TIOA0	0x00000020
> +#define AT91_TC_BMR_TC2XC2S_TIOA1	0x00000030
> +
> +#endif
> diff --git a/include/asm-arm/arch-at91/at91rm9200.h b/include/asm-arm/arch-at91/at91rm9200.h
> new file mode 100644
> index 0000000..da6843b
> --- /dev/null
> +++ b/include/asm-arm/arch-at91/at91rm9200.h
> @@ -0,0 +1,135 @@
> +/*
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your optionany later version.

ws
'(at your option)'

Tom