From: Chris Dearman <chris@mips.com>
To: "Anoop P.A." <Anoop_P.A@pmc-sierra.com>
Cc: Ralf Baechle <ralf@linux-mips.org>, linux-mips@linux-mips.org
Subject: Re: Cached Base address difference.
Date: Wed, 03 Feb 2010 11:15:05 -0800 [thread overview]
Message-ID: <4B69CB39.1090504@mips.com> (raw)
In-Reply-To: <A7DEA48C84FD0B48AAAE33F328C0201404809DEA@BBY1EXM11.pmc_nt.nt.pmc-sierra.bc.ca>
Anoop P.A. wrote:
> Hi Ralf,
>
> I am sorry if it is not clear from my last mail.
>
> What I want to convey is,
>
> "See MIPS Run" explains "window on physical memory (cached)" will start
> @ 0x9000_0000_0000_0000.
>
> You can see "See MIPS Run" page under suspect from this link
> http://books.google.co.in/books?id=kk8G2gK4Tw8C&lpg=PP1&dq=see%20mips%20
> run&pg=PA51#v=onepage&q=&f=false
>
> How ever as you mentioned Linux source defines CAC_BASE
> 0x98000000_00000000
The Linux header file is correct; the cached and uncached regions are
swapped in the "See MIPS Run" diagram.
The full MIPS64 memory map is documented in Volume III of the
architecture manual which you can download from
http://www.mips.com/products/architectures/mips64/
Chris
--
Chris Dearman Desk: +1 408 530 5092 Cell: +1 408 398 5531
MIPS Technologies Inc 955 East Arques Ave, Sunnyvale CA 94085
prev parent reply other threads:[~2010-02-03 19:15 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-02-01 9:10 [PATCH urgent] MIPS: Fixup of the r4k timer Wu Zhangjin
2010-02-02 3:03 ` Shane McDonald
2010-02-03 1:29 ` Ralf Baechle
2010-02-03 11:34 ` Cached Base address difference Anoop P.A.
2010-02-03 11:34 ` Anoop P.A.
2010-02-03 12:33 ` Ralf Baechle
2010-02-03 13:38 ` Anoop P.A.
2010-02-03 13:38 ` Anoop P.A.
2010-02-03 19:15 ` Chris Dearman [this message]
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