Re: ONFI 4GB and beyond NAND support

[Blair Barnett <bbarnett@nethra.us.com>]

Paulraj, Sandeep wrote:
>   
>> I have two questions for the MTD gang, but couldn't find the answer in
>> the archives, nor elsewhere on the web.
>>
>> 1. What's the plan, if any, for the MTD NAND layer to support the ONFI
>> standard?
>>     
> I guess somebody has to write the necessary code and send the patch.
> ONFI NANds get all the necessary info from a param table I believe. 
>   
O.K. That's fair.
>   
>> 2. What's the plan, if any, for the MTD NAND layer to support 4 GB NANDs
>> (and greater)?
>>     
> This is already there for more than a year. Use the latest kernels
>   
Let's see. I'm using 2.6.33, so that seems like a pretty new kernel. I 
think the problem may in the code for figuring out the NAND geometry in 
nand_get_flash_type(). If type->pagesize == 0,  0x46 is the extid value. 
Unfortunately, this decodes in the NAND code to the following geometry:

Writesize = 4096 bytes
oobsize= 128 bytes
erasesize = 64 K bytes (extid & 0x03)

Reading the chip's ONFI Page parameters, one gets this geometry:

writesize = 4096 bytes
oobsize = 224 bytes
erasesize = 1024 K bytes

It appears a simple fix for the erasesize is to use 0x7 as the mask, but 
the oobsize is a little more problematic.

The code
mtd->oobsize = (8 << (extid & 0x01)) * (mtd->writesize >> 9);

doesn't really work to create a 224 byte oobsize value, not to mention I 
don't know where to look to create the ECC structure required.

Do you have a preference for how to fix this?

-blair