From: Gilles Chanteperdrix <gilles.chanteperdrix@xenomai.org>
To: Sinisa Denic <sinisa.denic@domain.hid>
Cc: xenomai@xenomai.org
Subject: Re: [Xenomai-help] ARM cached,non-cached memory
Date: Mon, 08 Mar 2010 16:13:42 +0100 [thread overview]
Message-ID: <4B951426.9040404@domain.hid> (raw)
In-Reply-To: <201003081559.56967.sinisa.denic@domain.hid>
Sinisa Denic wrote:
> On Monday 08 March 2010 14:52:22 you wrote:
>> "write-combining does not guarantee that
>>
>>> the combination of writes and reads is done in the correct order"
>
>
> No, I've briefly read general description on wikipedia. :), so I don't know
> wether it has impact on ARM arch.
As this is used by the kernel for its mapping (when you create aliases,
i.e. map the same area several times in the same address space), it must
work reliably. Anyway, what I am interested in is a quick test with your
application, measuring performances, so that we know whether
implementing this feature completely is worth the trouble, and in that
case, we will investigate further these issues.
--
Gilles.
next prev parent reply other threads:[~2010-03-08 15:13 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-03-02 14:27 [Xenomai-help] ARM cached,non-cached memory Sinisa Denic
2010-03-02 14:32 ` Gilles Chanteperdrix
2010-03-02 15:31 ` Sinisa Denic
2010-03-02 18:42 ` Gilles Chanteperdrix
2010-03-06 10:42 ` Gilles Chanteperdrix
2010-03-08 7:58 ` Sinisa Denic
2010-03-08 13:52 ` Gilles Chanteperdrix
2010-03-08 14:59 ` Sinisa Denic
2010-03-08 15:13 ` Gilles Chanteperdrix [this message]
2010-03-08 15:34 ` Sinisa Denic
2010-07-11 11:32 ` Bosko Radivojevic
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