[U-Boot] [PATCH 6/8] ux500: add SoC-specific code

[Tom <Tom.Rix@windriver.com>]

Rabin Vincent wrote:
> Add the base SoC code for ST-Ericsson's Ux500 series of Cortex A9 based
> SoCs.
> 
> Even though this is a Cortex A9, we put it under Cortex A8 to avoid code
> duplication, since the CPU specific code can be used unmodified across
> the two CPUs.
> 
I would rather have arm_cortexa9 be created.
Minimize the duplication by only copying the arm_cortexa8 files
that are needed.
Make this initial copying of a8->a9 its own patch

> Acked-by: Michael Brandt <michael.brandt@stericsson.com>
> Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com>
> ---
>  cpu/arm_cortexa8/ux500/Makefile       |   45 +++++++++++++++++++
>  cpu/arm_cortexa8/ux500/clock.c        |   56 +++++++++++++++++++++++
>  cpu/arm_cortexa8/ux500/cpu.c          |   49 ++++++++++++++++++++
>  include/asm-arm/arch-ux500/clock.h    |   72 ++++++++++++++++++++++++++++++
>  include/asm-arm/arch-ux500/hardware.h |   78 +++++++++++++++++++++++++++++++++
>  5 files changed, 300 insertions(+), 0 deletions(-)
>  create mode 100644 cpu/arm_cortexa8/ux500/Makefile
>  create mode 100644 cpu/arm_cortexa8/ux500/clock.c
>  create mode 100644 cpu/arm_cortexa8/ux500/cpu.c
>  create mode 100644 include/asm-arm/arch-ux500/clock.h
>  create mode 100644 include/asm-arm/arch-ux500/hardware.h
> 
> diff --git a/cpu/arm_cortexa8/ux500/Makefile b/cpu/arm_cortexa8/ux500/Makefile
> new file mode 100644
> index 0000000..c671010
> --- /dev/null
> +++ b/cpu/arm_cortexa8/ux500/Makefile
> @@ -0,0 +1,45 @@
> +#
> +# (C) Copyright 2000-2003
> +# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
> +#
> +# See file CREDITS for list of people who contributed to this
> +# project.
> +#
> +# This program is free software; you can redistribute it and/or
> +# modify it under the terms of the GNU General Public License as
> +# published by the Free Software Foundation; either version 2 of
> +# the License, or (at your option) any later version.
> +#
> +# This program is distributed in the hope that it will be useful,
> +# but WITHOUT ANY WARRANTY; without even the implied warranty of
> +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> +# GNU General Public License for more details.
> +#
> +# You should have received a copy of the GNU General Public License
> +# along with this program; if not, write to the Free Software
> +# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> +# MA 02111-1307 USA
> +#
> +
> +include $(TOPDIR)/config.mk
> +
> +LIB	=  $(obj)lib$(SOC).a
> +
> +COBJS	+= clock.o cpu.o
> +
> +SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
> +OBJS	:= $(addprefix $(obj),$(COBJS) $(SOBJS))
> +
> +all:	 $(obj).depend $(LIB)
> +
> +$(LIB):	$(OBJS)
> +	$(AR) $(ARFLAGS) $@ $(OBJS)
> +
> +#########################################################################
> +
> +# defines $(obj).depend target
> +include $(SRCTREE)/rules.mk
> +
> +sinclude $(obj).depend
> +
> +#########################################################################
> diff --git a/cpu/arm_cortexa8/ux500/clock.c b/cpu/arm_cortexa8/ux500/clock.c
> new file mode 100644
> index 0000000..6b67fe8
> --- /dev/null
> +++ b/cpu/arm_cortexa8/ux500/clock.c
> @@ -0,0 +1,56 @@
> +/*
> + * (C) Copyright 2010 ST-Ericsson SA
> + * Author: Rabin Vincent <rabin.vincent@stericsson.com>
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +#include <common.h>
> +#include <asm/io.h>
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +struct clkrst {
> +	unsigned int pcken;
> +	unsigned int pckdis;
> +	unsigned int kcken;
> +	unsigned int kckdis;
> +};
> +
> +static unsigned int clkrst_base[] = {
> +	U8500_CLKRST1_BASE,
> +	U8500_CLKRST2_BASE,
> +	U8500_CLKRST3_BASE,
> +	0,
0 ?
If this is an exception, it should be checked for.
Should also have a comment.

Expected to have U8500_CLKRSTR4_BASE.

> +	U8500_CLKRST5_BASE,
> +	U8500_CLKRST6_BASE,
> +	U8500_CLKRST7_BASE,
> +};

Could these structures be added to an arch or board *.h ?

> +
> +/* Turn on peripheral clock at PRCC level */
> +void u8500_clock_enable(int periph, int kern, int cluster)
> +{
> +	struct clkrst *clkrst = (struct clkrst *) clkrst_base[periph - 1];

-1 on array access.
Convert to unsigned access

> +
> +	if (kern != -1)
> +		writel(1 << kern, &clkrst->kcken);
> +
> +	if (cluster != -1)
> +		writel(1 << cluster, &clkrst->pcken);

Checking that some of the parameters are expected to be bad.
This function should be split.

> +}
> diff --git a/cpu/arm_cortexa8/ux500/cpu.c b/cpu/arm_cortexa8/ux500/cpu.c
> new file mode 100644
> index 0000000..b3c66fa
> --- /dev/null
> +++ b/cpu/arm_cortexa8/ux500/cpu.c
> @@ -0,0 +1,49 @@
> +/*
> + * (C) Copyright 2010 ST-Ericsson SA
> + * Author: Rabin Vincent <rabin.vincent@stericsson.com>
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +#include <common.h>
> +#include <asm/io.h>
> +#include <asm/arch/clock.h>
> +#include <nomadik_gpio.h>
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +unsigned long nmk_gpio_base[] = {
> +	U8500_GPIO0_BASE,
> +	U8500_GPIO1_BASE,
> +	U8500_GPIO2_BASE,
> +	U8500_GPIO3_BASE,
> +	U8500_GPIO4_BASE,
> +	U8500_GPIO5_BASE,
> +	U8500_GPIO6_BASE,
> +	U8500_GPIO7_BASE,
> +	U8500_GPIO8_BASE
> +};
> +

Could this be added to arch or board *.h ?

> +void reset_cpu(unsigned long ignored)
> +{
> +	struct prcmu *prcmu = (struct prcmu *) U8500_PRCMU_BASE;
> +
> +	writel(0x1, &prcmu->ape_softrst);
> +	while (1);

busy wait..
put ';' on next line
Add a comment that this really is an infinite loop

> +}
> diff --git a/include/asm-arm/arch-ux500/clock.h b/include/asm-arm/arch-ux500/clock.h
> new file mode 100644
> index 0000000..b384f49
> --- /dev/null
> +++ b/include/asm-arm/arch-ux500/clock.h
> @@ -0,0 +1,72 @@
> +/*
> + * (C) Copyright 2010 ST-Ericsson SA
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +#ifndef __ASM_ARCH_CLOCK
> +#define __ASM_ARCH_CLOCK
> +
> +struct prcmu {
> +	unsigned int armclkfix_mgt;
> +	unsigned int armclk_mgt;
> +	unsigned int svammdspclk_mgt;
> +	unsigned int siammdspclk_mgt;
> +	unsigned int reserved;
> +	unsigned int sgaclk_mgt;
> +	unsigned int uartclk_mgt;
> +	unsigned int msp02clk_mgt;
> +	unsigned int i2cclk_mgt;
> +	unsigned int sdmmcclk_mgt;
> +	unsigned int slimclk_mgt;
> +	unsigned int per1clk_mgt;
> +	unsigned int per2clk_mgt;
> +	unsigned int per3clk_mgt;
> +	unsigned int per5clk_mgt;
> +	unsigned int per6clk_mgt;
> +	unsigned int per7clk_mgt;
> +	unsigned int lcdclk_mgt;
> +	unsigned int reserved1;
> +	unsigned int bmlclk_mgt;
> +	unsigned int hsitxclk_mgt;
> +	unsigned int hsirxclk_mgt;
> +	unsigned int hdmiclk_mgt;
> +	unsigned int apeatclk_mgt;
> +	unsigned int apetraceclk_mgt;
> +	unsigned int mcdeclk_mgt;
> +	unsigned int ipi2cclk_mgt;
> +	unsigned int dsialtclk_mgt;
> +	unsigned int spare2clk_mgt;
> +	unsigned int dmaclk_mgt;
> +	unsigned int b2r2clk_mgt;
> +	unsigned int tvclk_mgt;
> +	unsigned int unused[82];
> +	unsigned int tcr;
> +	unsigned int unused1[23];
> +	unsigned int ape_softrst;
> +};
> +
> +extern void u8500_clock_enable(int periph, int kern, int cluster);
> +
> +static inline void u8500_prcmu_enable(unsigned int *reg)
> +{
> +	writel(readl(reg) | (1 << 8), reg);
> +}
> +
> +#endif /* __ASM_ARCH_CLOCK */
> diff --git a/include/asm-arm/arch-ux500/hardware.h b/include/asm-arm/arch-ux500/hardware.h
> new file mode 100644
> index 0000000..2d75538
> --- /dev/null
> +++ b/include/asm-arm/arch-ux500/hardware.h
> @@ -0,0 +1,78 @@
> +/*
> + * (C) Copyright 2010 ST-Ericsson SA
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
> + * MA 02110-1301 USA
> + */
> +
> +#ifndef __ASM_ARCH_HARDWARE_H
> +#define __ASM_ARCH_HARDWARE_H
> +
> +/* Peripheral clusters */
> +
> +#define U8500_PER3_BASE		0x80000000
> +#define U8500_PER2_BASE		0x80110000
> +#define U8500_PER1_BASE		0x80120000
> +#define U8500_PER4_BASE		0x80150000
> +
> +#define U8500_PER6_BASE		0xa03c0000
> +#define U8500_PER7_BASE		0xa03d0000
> +#define U8500_PER5_BASE		0xa03e0000
> +

Extra line spaces should be removed.

> +/* GPIO */
> +
> +#define U8500_GPIO0_BASE	(U8500_PER1_BASE + 0xE000)
> +#define U8500_GPIO1_BASE	(U8500_PER1_BASE + 0xE000 + 0x80)
> +
> +#define U8500_GPIO2_BASE	(U8500_PER3_BASE + 0xE000)
> +#define U8500_GPIO3_BASE	(U8500_PER3_BASE + 0xE000 + 0x80)
> +#define U8500_GPIO4_BASE	(U8500_PER3_BASE + 0xE000 + 0x100)
> +#define U8500_GPIO5_BASE	(U8500_PER3_BASE + 0xE000 + 0x180)
> +
> +#define U8500_GPIO6_BASE	(U8500_PER2_BASE + 0xE000)
> +#define U8500_GPIO7_BASE	(U8500_PER2_BASE + 0xE000 + 0x80)
> +
> +#define U8500_GPIO8_BASE	(U8500_PER5_BASE + 0x1E000)
> +

Extra line spaces should be removed.

> +/* Per7 */
> +#define U8500_MTU0_BASE		(U8500_PER7_BASE + 0xa000)
> +#define U8500_MTU1_BASE		(U8500_PER7_BASE + 0xb000)
> +#define U8500_CLKRST7_BASE	(U8500_PER7_BASE + 0xf000)
> +
> +/* Per6 */
> +#define U8500_CLKRST6_BASE	(U8500_PER6_BASE + 0xf000)
> +
> +/* Per5 */
> +#define U8500_CLKRST5_BASE	(U8500_PER5_BASE + 0x1f000)
> +
> +/* Per4 */
> +#define U8500_PRCMU_BASE	(U8500_PER4_BASE + 0x07000)
> +
> +/* Per3 */
> +#define U8500_UART2_BASE	(U8500_PER3_BASE + 0x7000)
> +#define U8500_CLKRST3_BASE	(U8500_PER3_BASE + 0xf000)
> +
> +/* Per2 */
> +#define U8500_CLKRST2_BASE	(U8500_PER2_BASE + 0xf000)
> +
> +/* Per1 */
> +#define U8500_UART0_BASE	(U8500_PER1_BASE + 0x0000)
> +#define U8500_UART1_BASE	(U8500_PER1_BASE + 0x1000)
> +#define U8500_CLKRST1_BASE	(U8500_PER1_BASE + 0xf000)
> +
> +#endif /* __ASM_ARCH_HARDWARE_H */

Tom