From: Jeremy Fitzhardinge <jeremy@goop.org>
To: Colin King <colin.king@canonical.com>
Cc: Ingo Molnar <mingo@redhat.com>, "H. Peter Anvin" <hpa@zytor.com>,
Thomas Gleixner <tglx@linutronix.de>,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH] x86: Disable 4MB page tables for Atom, work around errata AAE44
Date: Wed, 31 Mar 2010 15:35:50 -0700 [thread overview]
Message-ID: <4BB3CE46.1050105@goop.org> (raw)
In-Reply-To: <1269271251-19775-1-git-send-email-colin.king@canonical.com>
On 03/22/2010 08:20 AM, Colin King wrote:
> "If software clears the PS (page size) bit in a present PDE (page directory
> entry), that will cause linear addresses mapped through this PDE to use
> 4-KByte pages instead of using a large page after old TLB entries are
> invalidated. Due to this erratum, if a code fetch uses this PDE before the
> TLB entry for the large page is invalidated then it may fetch from a different
> physical address than specified by either the old large page translation or
> the new 4-KByte page translation. This erratum may also cause speculative code
> fetches from incorrect addresses."
>
Does this only affect non-PAE 32-bit? Or does it also affect 3 and 4
level pagetables with 2MB large pages?
J
next prev parent reply other threads:[~2010-03-31 22:35 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-03-22 15:20 [PATCH] x86: Disable 4MB page tables for Atom, work around errata AAE44 Colin King
2010-03-31 22:35 ` Jeremy Fitzhardinge [this message]
2010-04-12 8:02 ` Andi Kleen
2010-04-12 14:37 ` H. Peter Anvin
2010-05-01 21:37 ` Yuhong Bao
2010-04-23 23:52 ` [tip:x86/urgent] x86: Disable large pages on CPUs with Atom erratum AAE44 tip-bot for H. Peter Anvin
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