From mboxrd@z Thu Jan 1 00:00:00 1970 From: Avi Kivity Subject: Re: KVM: x86: Push potential exception error code on task switches Date: Wed, 14 Apr 2010 16:08:41 +0300 Message-ID: <4BC5BE59.4070007@redhat.com> References: <4BC5B0FB.8020700@siemens.com> <4BC5B38C.2040500@redhat.com> <4BC5B6FE.8060706@siemens.com> <4BC5BA84.8070507@redhat.com> <4BC5BBE1.5070706@siemens.com> <4BC5BE25.8090800@redhat.com> Mime-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-15; format=flowed Content-Transfer-Encoding: 7bit Cc: Marcelo Tosatti , kvm , Gleb Natapov To: Jan Kiszka Return-path: Received: from mx1.redhat.com ([209.132.183.28]:1720 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755271Ab0DNNIo (ORCPT ); Wed, 14 Apr 2010 09:08:44 -0400 In-Reply-To: <4BC5BE25.8090800@redhat.com> Sender: kvm-owner@vger.kernel.org List-ID: On 04/14/2010 04:07 PM, Avi Kivity wrote: > On 04/14/2010 03:58 PM, Jan Kiszka wrote: >> >>> The TSS descriptor (gate doesn't have a size). But isn't it >>> possible to >>> have a 32-bit TSS with a 16-bit CS/SS? >> Might be possible, but will cause troubles as the spec says: >> >> "The error code is pushed on the stack as a doubleword or word >> (depending on the default interrupt, trap, or task gate size)." > > My guess is that this is an error and that the 32-bitness of a TSS > only refers to the format of the TSS, and has nothing to do with the > code that actually runs. I'll ask Intel about it. Meanwhile this can > be applied, if there's a problem with 16-bit exception handlers > running through a 32-bit task referenced by a task gate in the IDT, it > can be fixed later. > I meant, after Gleb's concerns are addressed. -- error compiling committee.c: too many arguments to function