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From: Nishanth Menon <nm-l0cyMroinI0@public.gmane.org>
To: "G, Manjunath Kondaiah" <manjugk-l0cyMroinI0@public.gmane.org>
Cc: "linux-omap-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
	<linux-omap-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
	"linux-i2c-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
	<linux-i2c-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
	"ben-linux-elnMNo+KYs3YtjvyW6yDsg@public.gmane.org"
	<ben-linux-elnMNo+KYs3YtjvyW6yDsg@public.gmane.org>,
	"Kalliguddi, Hema" <hemahk-l0cyMroinI0@public.gmane.org>,
	Aaro Koskinen
	<Aaro.Koskinen-xNZwKgViW5gAvxtiuMwx3w@public.gmane.org>,
	Tony Lindgren <tony-4v6yS6AI5VpBDgjK7y7TUQ@public.gmane.org>
Subject: Re: [PATCH v5] OMAP2/3: I2C: Errata ID i207: Clear wrong RDR interrupt
Date: Tue, 27 Apr 2010 10:01:38 -0500	[thread overview]
Message-ID: <4BD6FC52.5000502@ti.com> (raw)
In-Reply-To: <1272379645-20523-1-git-send-email-manjugk-l0cyMroinI0@public.gmane.org>

G, Manjunath Kondaiah had written, on 04/27/2010 09:47 AM, the following:
> Under certain rare conditions, I2C_STAT[13].RDR bit may be set
> and the corresponding interrupt fire, even there is no data in
> the receive FIFO, or the I2C data transfer is still ongoing.
> These spurious RDR events must be ignored by the software.
> 
> This patch handles and ignores RDR spurious interrupts.
> 
> The below sequence is required in interrupt handler for
> handling this errata:
> 1. If RDR is set to 1, clear RDR
> 2. Read I2C status register and check for BusBusy bit. If BusBusy
> bit is set, skip remaining steps.
> 3. If BusBusy bit is not set, perform read operation on I2C status
> register.
> 4. If RDR is set, clear the same. Check RDR again and clear if it sets
> RDR bit again.
> 5. Perform I2C Data Read operation N number of times(where N is value
> read from the register BUFSTAT-RXSTAT bit fields).
> 
> Note : This errata is applicable for OMAP2 and OMAP3 platforms only.
> It is not applicable for OMAP4.
> 
> Signed-off-by: Manjunatha GK <manjugk-l0cyMroinI0@public.gmane.org>
> Cc: linux-i2c-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
> Cc: ben-linux-elnMNo+KYs3YtjvyW6yDsg@public.gmane.org
> Cc: Kalliguddi, Hema <hemahk-l0cyMroinI0@public.gmane.org>
> Cc: Nishanth Menon <nm-l0cyMroinI0@public.gmane.org>
> Cc: Aaro Koskinen <Aaro.Koskinen-xNZwKgViW5gAvxtiuMwx3w@public.gmane.org>
> Cc: Tony Lindgren <tony-4v6yS6AI5VpBDgjK7y7TUQ@public.gmane.org>
> ---
>  drivers/i2c/busses/i2c-omap.c |   39 +++++++++++++++++++++++++++++++++++++++
>  1 files changed, 39 insertions(+), 0 deletions(-)
> 
> diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
> index ef73483..f232f96 100644
> --- a/drivers/i2c/busses/i2c-omap.c
> +++ b/drivers/i2c/busses/i2c-omap.c
> @@ -199,6 +199,7 @@ struct omap_i2c_dev {
>  	u16			bufstate;
>  	u16			syscstate;
>  	u16			westate;
> +	bool			errata_i207;
Just my 2cents:

Could we use a u32 quirk? this will allow multiple similar quirks 
(already existing in the driver to use this mechanism)

and
#define OMAP_I2C_QUIRK_i207	0x1
/* we can add more quirks here and cleanup the i2c driver quiet a bit */

#define IS_OMAP_I2C_QUIRK(d,q) ((d)->q & quirk)

>  };
>  
>  const static u8 reg_map[] = {
> @@ -498,6 +499,12 @@ static int omap_i2c_init(struct omap_i2c_dev *dev)
>  	/* Take the I2C module out of reset: */
>  	omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, OMAP_I2C_CON_EN);
>  
> +	dev->errata_i207 = false;
> +
> +	if (cpu_is_omap2430() || cpu_is_omap34xx()) {
> +		dev->errata_i207 = true;
> +	}
oneliner with {}? did you run checkpatch.pl?
> +
>  	/* Enable interrupts */
>  	dev->iestate = (OMAP_I2C_IE_XRDY | OMAP_I2C_IE_RRDY |
>  			OMAP_I2C_IE_ARDY | OMAP_I2C_IE_NACK |
> @@ -695,6 +702,34 @@ omap_i2c_ack_stat(struct omap_i2c_dev *dev, u16 stat)
>  	omap_i2c_write_reg(dev, OMAP_I2C_STAT_REG, stat);
>  }
>  
> +static inline void i2c_omap_errata_i207(struct omap_i2c_dev *dev, u16 stat)
> +{
> +	/*
> +	 * I2C Errata(Errata Nos. OMAP2: 1.67, OMAP3: 1.8)
> +	 * Not applicable for OMAP4.
> +	 * Under certain rare conditions, RDR could be set again
> +	 * when the bus is busy, then ignore the interrupt and
> +	 * clear the interrupt.
> +	 */
> +	if (stat & OMAP_I2C_STAT_RDR) {
> +		/* Step 1: If RDR is set, clear it */
> +		omap_i2c_ack_stat(dev, OMAP_I2C_STAT_RDR);
> +
> +		/* Step 2: */
> +		if(!(omap_i2c_read_reg(dev, OMAP_I2C_STAT_REG)
> +						& OMAP_I2C_STAT_BB)) {
> +
> +			/* Step 3: */
> +			if(omap_i2c_read_reg(dev,OMAP_I2C_STAT_REG)
> +						& OMAP_I2C_STAT_RDR) {
> +				omap_i2c_ack_stat(dev,OMAP_I2C_STAT_RDR);
> +				dev_dbg(dev->dev,"RDR when the bus is busy.\n");
> +			}
> +
> +		}
> +	}
> +}
> +
>  /* rev1 devices are apparently only on some 15xx */
>  #ifdef CONFIG_ARCH_OMAP15XX
>  
> @@ -826,6 +861,10 @@ complete:
>  		}
>  		if (stat & (OMAP_I2C_STAT_RRDY | OMAP_I2C_STAT_RDR)) {
>  			u8 num_bytes = 1;
> +
> +			if (dev->errata_i207)
> +				i2c_omap_errata_i207(dev, stat);
> +
>  			if (dev->fifo_size) {
>  				if (stat & OMAP_I2C_STAT_RRDY)
>  					num_bytes = dev->fifo_size;
looks good overall.. thanks..

-- 
Regards,
Nishanth Menon

      parent reply	other threads:[~2010-04-27 15:01 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2010-04-27 14:47 [PATCH v5] OMAP2/3: I2C: Errata ID i207: Clear wrong RDR interrupt Manjunatha GK
2010-04-27 15:00 ` Tony Lindgren
2010-04-28  5:11   ` G, Manjunath Kondaiah
     [not found] ` <1272379645-20523-1-git-send-email-manjugk-l0cyMroinI0@public.gmane.org>
2010-04-27 15:01   ` Nishanth Menon [this message]

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