Changed the default PLE_Gap to 128 for
1. not using odd number like 41
2. getting a little bit more PLE vmexits to improve performance

Signed-off-by: Zhai Edwin <edwin.zhai@intel.com>


diff -r d77a88f938c6 xen/arch/x86/hvm/vmx/vmcs.c
--- a/xen/arch/x86/hvm/vmx/vmcs.c	Tue May 11 14:05:28 2010 +0100
+++ b/xen/arch/x86/hvm/vmx/vmcs.c	Wed May 12 08:27:00 2010 +0800
@@ -53,7 +53,7 @@ boolean_param("unrestricted_guest", opt_
  * Time is measured based on a counter that runs at the same rate as the TSC,
  * refer SDM volume 3b section 21.6.13 & 22.1.3.
  */
-static unsigned int __read_mostly ple_gap = 41;
+static unsigned int __read_mostly ple_gap = 128;
 integer_param("ple_gap", ple_gap);
 static unsigned int __read_mostly ple_window = 4096;
 integer_param("ple_window", ple_window);