From: Orjan Friberg <of@flatfrog.com>
To: Sascha Hauer <s.hauer@pengutronix.de>
Cc: barebox@lists.infradead.org
Subject: Re: OMAP 3530 arch_shutdown "undefined instruction"
Date: Thu, 27 May 2010 13:03:27 +0200 [thread overview]
Message-ID: <4BFE517F.9050704@flatfrog.com> (raw)
In-Reply-To: <20100527093132.GC23664@pengutronix.de>
On 2010-05-27 11:31, Sascha Hauer wrote:
> Seems this does not work on Cortex Processors. Can you try replacing
> this with the following please:
>
> asm volatile (
> "bl __mmu_cache_flush;"
> "bl __mmu_cache_off;"
> :
> :
> : "r0", "r1", "r2", "r3", "r6", "r10", "r12", "cc", "memory"
> );
Thanks, this seems to work fine (in the sense that I can load and run a
second stage bootloader; I haven't tried verifying what happens with the
I and D cache).
--
Orjan Friberg
FlatFrog Laboratories AB
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next prev parent reply other threads:[~2010-05-27 11:03 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-05-26 14:48 OMAP 3530 arch_shutdown "undefined instruction" Orjan Friberg
2010-05-27 9:31 ` Sascha Hauer
2010-05-27 11:03 ` Orjan Friberg [this message]
-- strict thread matches above, loose matches on Subject: below --
2010-06-08 8:02 Luca Ceresoli
2010-06-10 12:22 ` Sascha Hauer
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