fsl_rio.c build problem

[kerstin jonsson <kerstin.jonsson@ericsson.com>]

[-- Attachment #1: Type: text/plain, Size: 404 bytes --]

Hi,

I'm using:

git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6.git

and building for ARCH=powerpc - mpc85xx_defconfig

arch/powerpc/sysdev/fsl_rio.c will not build due to a missing
MCSR_MASK bitmask definition.

The attached patch is based on code found in

git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc.git

and - at the least - will fix the build problem.

BR,
Kerstin


[-- Attachment #2: 0001-fix-fsl_rio.c-build-problem-in-powerpc-mpc85xx_defco.patch --]
[-- Type: text/x-patch, Size: 1537 bytes --]

>From 42d0a01865beda04b70549245ce1854c8f0074d3 Mon Sep 17 00:00:00 2001
From: Kerstin Jonsson <kerstin.jonsson@ericsson.com>
Date: Fri, 4 Jun 2010 12:56:02 +0200
Subject: [PATCH] fix fsl_rio.c build problem in powerpc mpc85xx_defconfig

---
 arch/powerpc/include/asm/reg_booke.h |   11 +++++++++++
 1 files changed, 11 insertions(+), 0 deletions(-)

diff --git a/arch/powerpc/include/asm/reg_booke.h b/arch/powerpc/include/asm/reg_booke.h
index 2360317..68c3833 100644
--- a/arch/powerpc/include/asm/reg_booke.h
+++ b/arch/powerpc/include/asm/reg_booke.h
@@ -231,6 +231,12 @@
 #define MCSR_LDG	0x00002000UL /* Guarded Load */
 #define MCSR_TLBSYNC	0x00000002UL /* Multiple tlbsyncs detected */
 #define MCSR_BSL2_ERR	0x00000001UL /* Backside L2 cache error */
+
+/* e500 parts may set unused bits in MCSR; mask these off */
+#define MCSR_MASK	(MCSR_MCP | MCSR_ICPERR | MCSR_DCP_PERR | \
+			MCSR_DCPERR | MCSR_BUS_IAERR | MCSR_BUS_RAERR | \
+			MCSR_BUS_WAERR | MCSR_BUS_IBERR | MCSR_BUS_RBERR | \
+			MCSR_BUS_WBERR | MCSR_BUS_IPERR | MCSR_BUS_RPERR)
 #endif
 
 #ifdef CONFIG_E200
@@ -243,6 +249,11 @@
 #define MCSR_BUS_DRERR 	0x00000008UL /* Read Bus Error on data load */
 #define MCSR_BUS_WRERR 	0x00000004UL /* Write Bus Error on buffered
 					store or cache line push */
+
+/* e200 parts may set unused bits in MCSR; mask these off */
+#define MCSR_MASK	(MCSR_MCP | MCSR_CP_PERR | MCSR_CPERR | \
+			MCSR_EXCP_ERR | MCSR_BUS_IRERR | MCSR_BUS_DRERR | \
+			MCSR_BUS_WRERR)
 #endif
 
 /* Bit definitions for the DBSR. */
-- 
1.7.1