From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from ocean.emcraft.com (ocean.emcraft.com [213.221.7.182]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id CF047B6EEA for ; Fri, 9 Jul 2010 06:36:31 +1000 (EST) Message-ID: <4C3636CA.9030409@emcraft.com> Date: Fri, 09 Jul 2010 00:36:26 +0400 From: Ilya Yanok MIME-Version: 1.0 To: Kumar Gala , linuxppc-dev@ozlabs.org Subject: Commit 3da34aa brakes MSI support on MPC8308 (possibly all MPC83xx) Content-Type: text/plain; charset=ISO-8859-1; format=flowed List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Hi Kumar, All, I've found that MSI work correctly with older kernels on my MPC8308RDB board and don't work with newer ones. After bisecting I've found that the source of the problem is commit 3da34aa: commit 3da34aae03d498ee62f75aa7467de93cce3030fd Author: Kumar Gala Date: Tue May 12 15:51:56 2009 -0500 powerpc/fsl: Support unique MSI addresses per PCIe Root Complex Its feasible based on how the PCI address map is setup that the region of PCI address space used for MSIs differs for each PHB on the same SoC. Instead of assuming that the address mappes to CCSRBAR 1:1 we read PEXCSRBAR (BAR0) for the PHB that the given pci_dev is on. Signed-off-by: Kumar Gala I can see BAR0 initialization for 85xx/86xx hardware but not for 83xx neigher in the kernel nor in U-Boot (that makes me think that all 83xx can be affected). I'm not actually an PCI expert so I've just tried to write IMMR base address to the BAR0 register from the U-Boot to get the correct address but this doesn't help. Please direct me how to init 83xx PCIE controller to make it compatible with this patch. Thanks in advance. Regards, Ilya.