From: Shinya Kuribayashi <skuribay@pobox.com>
To: David VomLehn <dvomlehn@cisco.com>,
ralf@linux-mips.org, macro@linux-mips.org
Cc: linux-mips@linux-mips.org
Subject: [PATCH 2/2] MIPS: Enable cpu_has_clo_clz for MIPS Technologies' platforms
Date: Tue, 13 Jul 2010 00:41:51 +0900 [thread overview]
Message-ID: <4C3B37BF.2090606@pobox.com> (raw)
In-Reply-To: <4C3B36B3.6010800@pobox.com>
Enable cpu_has_clo_clz only when CONFIG_CPU_MIPS32 or CONFIG_CPU_MIPS64
is selected. This will optimize fls() and __fls() to use CLZ insn, and
eventually ffs() and __ffs() as well.
Malta and MIPSSim are development platforms, and need to take care of
various processor configurations, release rivisions and so on, even
across different MIPS ISAs. For such platforms we have to be careful,
for instance, with turning on cpu_has_mips{32,64}r[12] features.
As for CLZ, all MIPS32/64 processors support it, regardless of release
revisions.
Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
---
.../include/asm/mach-malta/cpu-feature-overrides.h | 2 ++
.../asm/mach-mipssim/cpu-feature-overrides.h | 2 ++
2 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/arch/mips/include/asm/mach-malta/cpu-feature-overrides.h b/arch/mips/include/asm/mach-malta/cpu-feature-overrides.h
index 2848cea..37e3583 100644
--- a/arch/mips/include/asm/mach-malta/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-malta/cpu-feature-overrides.h
@@ -32,6 +32,7 @@
/* #define cpu_has_vtag_icache ? */
/* #define cpu_has_dc_aliases ? */
/* #define cpu_has_ic_fills_f_dc ? */
+#define cpu_has_clo_clz 1
#define cpu_has_nofpuex 0
/* #define cpu_has_64bits ? */
/* #define cpu_has_64bit_zero_reg ? */
@@ -58,6 +59,7 @@
/* #define cpu_has_vtag_icache ? */
/* #define cpu_has_dc_aliases ? */
/* #define cpu_has_ic_fills_f_dc ? */
+#define cpu_has_clo_clz 1
#define cpu_has_nofpuex 0
/* #define cpu_has_64bits ? */
/* #define cpu_has_64bit_zero_reg ? */
diff --git a/arch/mips/include/asm/mach-mipssim/cpu-feature-overrides.h b/arch/mips/include/asm/mach-mipssim/cpu-feature-overrides.h
index 779b022..27aaaa5 100644
--- a/arch/mips/include/asm/mach-mipssim/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-mipssim/cpu-feature-overrides.h
@@ -31,6 +31,7 @@
/* #define cpu_has_vtag_icache ? */
/* #define cpu_has_dc_aliases ? */
/* #define cpu_has_ic_fills_f_dc ? */
+#define cpu_has_clo_clz 1
#define cpu_has_nofpuex 0
/* #define cpu_has_64bits ? */
/* #define cpu_has_64bit_zero_reg ? */
@@ -56,6 +57,7 @@
/* #define cpu_has_vtag_icache ? */
/* #define cpu_has_dc_aliases ? */
/* #define cpu_has_ic_fills_f_dc ? */
+#define cpu_has_clo_clz 1
#define cpu_has_nofpuex 0
/* #define cpu_has_64bits ? */
/* #define cpu_has_64bit_zero_reg ? */
--
1.7.1.1
next prev parent reply other threads:[~2010-07-12 15:42 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-07-12 15:37 [PATCH 0/2] MIPS: cpu-feature-overrides patches Shinya Kuribayashi
2010-07-12 15:41 ` [PATCH 1/2] MIPS: PowerTV: Provide cpu-feature-overrides.h Shinya Kuribayashi
2011-05-19 15:38 ` Ralf Baechle
2010-07-12 15:41 ` Shinya Kuribayashi [this message]
2011-05-19 15:39 ` [PATCH 2/2] MIPS: Enable cpu_has_clo_clz for MIPS Technologies' platforms Ralf Baechle
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