From: "H. Peter Anvin" <hpa@zytor.com>
To: Jeremy Fitzhardinge <jeremy@goop.org>
Cc: Zachary Amsden <zamsden@redhat.com>,
Glauber Costa <glommer@redhat.com>,
Thomas Gleixner <tglx@linutronix.de>, Avi Kivity <avi@redhat.com>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] x86: fix ordering constraints on crX read/writes
Date: Thu, 15 Jul 2010 11:54:42 -0700 [thread overview]
Message-ID: <4C3F5972.2030600@zytor.com> (raw)
In-Reply-To: <4C3F1C84.8080503@goop.org>
On 07/15/2010 07:34 AM, Jeremy Fitzhardinge wrote:
> On 07/14/2010 06:29 PM, H. Peter Anvin wrote:
>> Yes, it will definitely NOT be pruned. I'm going to file a gcc documentation request to see if any of this is actually needed, though. There may also be a need for gcc to handle *inbound* general memory constraints.
>>
>
> You mean "depends on all prior memory updates"? We have been relying on
> "memory" to do that (barrier(), for example), but it would be nice to
> explicitly confirm that's OK, or get something which is guaranteed to be OK.
>
No, we haven't. You're misunderstanding what a "memory" clobber does.
A clobber affects the output side only, but doesn't inherently provide
ordering on the input side. Apparently this is implicit in "asm
volatile", which is a very important property.
-hpa
--
H. Peter Anvin, Intel Open Source Technology Center
I work for Intel. I don't speak on their behalf.
next prev parent reply other threads:[~2010-07-15 18:55 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-07-14 22:12 [PATCH] x86: fix ordering constraints on crX read/writes Jeremy Fitzhardinge
2010-07-15 0:28 ` Zachary Amsden
2010-07-15 0:55 ` Jeremy Fitzhardinge
2010-07-15 1:00 ` Zachary Amsden
2010-07-15 1:29 ` H. Peter Anvin
2010-07-15 14:34 ` Jeremy Fitzhardinge
2010-07-15 18:54 ` H. Peter Anvin [this message]
2010-07-15 19:28 ` Jeremy Fitzhardinge
2010-07-15 19:36 ` H. Peter Anvin
2010-07-15 19:57 ` Jeremy Fitzhardinge
2010-07-15 7:07 ` Avi Kivity
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