From: Min Lee <min.lee@gatech.edu>
To: Xen-devel@lists.xensource.com
Subject: Re: [Q] guest and user protection on x86-64 by paging
Date: Mon, 02 Aug 2010 10:35:18 -0400 [thread overview]
Message-ID: <4C56D7A6.1030600@gatech.edu> (raw)
In-Reply-To: <4C56665F.6030808@goop.org>
I see..
Thanks for your help, Jeremy.
Min
On 8/2/2010 2:31 AM, Jeremy Fitzhardinge wrote:
> On 08/01/2010 09:01 AM, Min Lee wrote:
>> Hi, folks.
>> one question. I'll read source code, but if one can give me brief
>> overview, it would be so helpful. On x86-64, guest and user runs both in
>> ring 3, and protect from each other by paging mechanism. but, how? Then
>> page table should be modified and TLB would be flushed for every system
>> call. This would be some overhead, I think. Is this what Xen is doing?
>
> Yes it is. 64-bit PV guests run at a considerable disadvantage. The only
> mitigating factor is that it sets the Global bit on usermode ptes, so that
> they don't get flushed from tlb during the transition.
>
> J
>
prev parent reply other threads:[~2010-08-02 14:35 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-08-01 16:01 [Q] guest and user protection on x86-64 by paging Min Lee
2010-08-02 6:31 ` Jeremy Fitzhardinge
2010-08-02 14:35 ` Min Lee [this message]
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