Re: [patch v2 1/1]sdhci support 10 bit divided clock Mode for spec 3.0

[David Vrabel <david.vrabel@csr.com>]

zhangfei gao wrote:
> 
> diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
> index 913555e..32dcac9 100644
> --- a/drivers/mmc/host/sdhci.c
> +++ b/drivers/mmc/host/sdhci.c
[...]
> @@ -1001,13 +1001,23 @@ static void sdhci_set_clock(struct sdhci_host
> *host, unsigned int clock)
>  	if (clock == 0)
>  		goto out;
> 
> -	for (div = 1;div < 256;div *= 2) {
> -		if ((host->max_clk / div) <= clock)
> -			break;
> +	if (host->version >= SDHCI_SPEC_300)
> +		max_div = 2046;
> +	else
> +		max_div = 256;
> +
> +	if(host->max_clk <= clock)
> +		div = 1;
> +	else {
> +		for (div = 2; div < max_div; div += 2) {
> +			if ((host->max_clk / div) <= clock)
> +				break;
> +		}

This isn't correct.  The divisor must be a power of two for 2.00
controllers.

David
-- 
David Vrabel, Senior Software Engineer, Drivers
CSR, Churchill House, Cambridge Business Park,  Tel: +44 (0)1223 692562
Cowley Road, Cambridge, CB4 0WZ                 http://www.csr.com/


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