From mboxrd@z Thu Jan  1 00:00:00 1970
From: Andy Furniss <andyqos@ukfsn.org>
Subject: Re: [PATCH] drm/radeon/kms: r600 CS parser fixes
Date: Wed, 18 Aug 2010 12:39:20 +0100
Message-ID: <4C6BC668.5030707@ukfsn.org>
References: <1281077645-10775-1-git-send-email-alexdeucher@gmail.com>	<4C616CC7.3070302@ukfsn.org>	<AANLkTim+vmFRs2=vY3jx9bvQg0mmCtwcQffd+o0g0+bm@mail.gmail.com>	<4C652096.7020705@ukfsn.org>
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To: Alex Deucher <alexdeucher@gmail.com>
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Alex Deucher wrote:

> Does reverting this part of the patch fix it?
>
> @@ -1055,10 +1055,10 @@ static void r600_texture_size(unsigned nfaces,
> unsigned blevel, unsigned nlevels
>         }
>         *l0_size = ALIGN((w0 * bpe), pitch_align) * h0 * d0;
>         *mipmap_size = offset;
> -       if (!blevel)
> -               *mipmap_size -= *l0_size;
>         if (!nlevels)
>                 *mipmap_size = *l0_size;
> +       if (!blevel)
> +               *mipmap_size -= *l0_size;
>   }

No, it does make the nunbers bigger, though -

radeon 0000:01:00.0: mipmap bo too small (512 512 4 0 0 1048576 -> 
1048576 have 1409024)

Just as a double check this is my diff against current d-r-t for this test.

diff --git a/drivers/gpu/drm/radeon/r600_cs.c 
b/drivers/gpu/drm/radeon/r600_cs.c
index d886494..f6580ca 100644
--- a/drivers/gpu/drm/radeon/r600_cs.c
+++ b/drivers/gpu/drm/radeon/r600_cs.c
@@ -1051,10 +1051,10 @@ static void r600_texture_size(unsigned nfaces, 
unsigned blevel, unsigned nlevels
         }
         *l0_size = ALIGN((w0 * bpe), pitch_align) * h0 * d0;
         *mipmap_size = offset;
-       if (!nlevels)
-               *mipmap_size = *l0_size;
         if (!blevel)
                 *mipmap_size -= *l0_size;
+       if (!nlevels)
+               *mipmap_size = *l0_size;
  }

  /**