diff for duplicates of <4CAB9333.50400@codeaurora.org> diff --git a/a/1.txt b/N1/1.txt index 56a5d6d..42bc116 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -15,3 +15,13 @@ Can anyone else help to test this patch on other ARM systems ? Cheers, Ashwin + + + +-------------- next part -------------- +A non-text attachment was scrubbed... +Name: Optimzed-ARM-RWSEM-algorithm.patch +Type: text/x-patch +Size: 5928 bytes +Desc: not available +URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20101005/12e3b202/attachment.bin> diff --git a/a/2.hdr b/a/2.hdr deleted file mode 100644 index 095a6bd..0000000 --- a/a/2.hdr +++ /dev/null @@ -1,5 +0,0 @@ -Content-Type: text/x-patch; - name="Optimzed-ARM-RWSEM-algorithm.patch" -Content-Transfer-Encoding: 7bit -Content-Disposition: inline; - filename="Optimzed-ARM-RWSEM-algorithm.patch" diff --git a/a/2.txt b/a/2.txt deleted file mode 100644 index f6da410..0000000 --- a/a/2.txt +++ /dev/null @@ -1,227 +0,0 @@ - -RWSEM implementation for ARM using atomic functions. -Heavily based on sh/include/asm/rwsem.h - -Signed-off-by: Ashwin Chaugule <ashwinc@codeaurora.org> ---- - arch/arm/Kconfig | 3 +- - arch/arm/include/asm/rwsem.h | 192 ++++++++++++++++++++++++++++++++++++++++++ - 2 files changed, 193 insertions(+), 2 deletions(-) - create mode 100644 arch/arm/include/asm/rwsem.h - -diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig -index 871838b..0149b9f 100644 ---- a/arch/arm/Kconfig -+++ b/arch/arm/Kconfig -@@ -129,10 +129,9 @@ config GENERIC_LOCKBREAK - - config RWSEM_GENERIC_SPINLOCK - bool -- default y - - config RWSEM_XCHGADD_ALGORITHM -- bool -+ def_bool y - - config ARCH_HAS_ILOG2_U32 - bool -diff --git a/arch/arm/include/asm/rwsem.h b/arch/arm/include/asm/rwsem.h -new file mode 100644 -index 0000000..1730ee1 ---- /dev/null -+++ b/arch/arm/include/asm/rwsem.h -@@ -0,0 +1,192 @@ -+/* rwsem.h: R/W semaphores implemented using ARM atomic functions. -+ * -+ * Written by Ashwin Chaugule (ashwinc@codeaurora.org). -+ * -+ * Derived from arch/sh/asm/rwsem.h -+ * -+ * include/asm-arm/rwsem.h: R/W semaphores for ARM using the stuff -+ * in lib/rwsem.c. -+ * -+ * Copyright (c) 2010, Code Aurora Forum. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 and -+ * only version 2 as published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA -+ * 02110-1301, USA. -+ */ -+ -+#ifndef _ASM_ARM_RWSEM_H -+#define _ASM_ARM_RWSEM_H -+ -+#ifndef _LINUX_RWSEM_H -+#error "please don't include asm/rwsem.h directly, use linux/rwsem.h instead" -+#endif -+ -+#ifdef __KERNEL__ -+#include <linux/list.h> -+#include <linux/spinlock.h> -+#include <asm/atomic.h> -+#include <asm/system.h> -+ -+/* -+ * the semaphore definition -+ */ -+struct rw_semaphore { -+ long count; -+#define RWSEM_UNLOCKED_VALUE 0x00000000 -+#define RWSEM_ACTIVE_BIAS 0x00000001 -+#define RWSEM_ACTIVE_MASK 0x0000ffff -+#define RWSEM_WAITING_BIAS (-0x00010000) -+#define RWSEM_ACTIVE_READ_BIAS RWSEM_ACTIVE_BIAS -+#define RWSEM_ACTIVE_WRITE_BIAS (RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS) -+ spinlock_t wait_lock; -+ struct list_head wait_list; -+#ifdef CONFIG_DEBUG_LOCK_ALLOC -+ struct lockdep_map dep_map; -+#endif -+}; -+ -+#ifdef CONFIG_DEBUG_LOCK_ALLOC -+# define __RWSEM_DEP_MAP_INIT(lockname) , .dep_map = { .name = #lockname } -+#else -+# define __RWSEM_DEP_MAP_INIT(lockname) -+#endif -+ -+#define __RWSEM_INITIALIZER(name) \ -+ { RWSEM_UNLOCKED_VALUE, __SPIN_LOCK_UNLOCKED((name).wait_lock), \ -+ LIST_HEAD_INIT((name).wait_list) \ -+ __RWSEM_DEP_MAP_INIT(name) } -+ -+#define DECLARE_RWSEM(name) \ -+ struct rw_semaphore name = __RWSEM_INITIALIZER(name) -+ -+extern struct rw_semaphore *rwsem_down_read_failed(struct rw_semaphore *sem); -+extern struct rw_semaphore *rwsem_down_write_failed(struct rw_semaphore *sem); -+extern struct rw_semaphore *rwsem_wake(struct rw_semaphore *sem); -+extern struct rw_semaphore *rwsem_downgrade_wake(struct rw_semaphore *sem); -+ -+extern void __init_rwsem(struct rw_semaphore *sem, const char *name, -+ struct lock_class_key *key); -+ -+#define init_rwsem(sem) \ -+do { \ -+ static struct lock_class_key __key; \ -+ \ -+ __init_rwsem((sem), #sem, &__key); \ -+} while (0) -+ -+/* -+ * lock for reading -+ */ -+static inline void __down_read(struct rw_semaphore *sem) -+{ -+ if (atomic_inc_return((atomic_t *)(&sem->count)) < 0) -+ rwsem_down_read_failed(sem); -+} -+ -+static inline int __down_read_trylock(struct rw_semaphore *sem) -+{ -+ int tmp; -+ -+ while ((tmp = sem->count) >= 0) { -+ if (tmp == cmpxchg(&sem->count, tmp, -+ tmp + RWSEM_ACTIVE_READ_BIAS)) { -+ return 1; -+ } -+ } -+ return 0; -+} -+ -+/* -+ * lock for writing -+ */ -+static inline void __down_write(struct rw_semaphore *sem) -+{ -+ int tmp; -+ -+ tmp = atomic_add_return(RWSEM_ACTIVE_WRITE_BIAS, -+ (atomic_t *)(&sem->count)); -+ if (tmp != RWSEM_ACTIVE_WRITE_BIAS) -+ rwsem_down_write_failed(sem); -+} -+ -+static inline int __down_write_trylock(struct rw_semaphore *sem) -+{ -+ int tmp; -+ -+ tmp = cmpxchg(&sem->count, RWSEM_UNLOCKED_VALUE, -+ RWSEM_ACTIVE_WRITE_BIAS); -+ return tmp == RWSEM_UNLOCKED_VALUE; -+} -+ -+/* -+ * unlock after reading -+ */ -+static inline void __up_read(struct rw_semaphore *sem) -+{ -+ int tmp; -+ -+ tmp = atomic_dec_return((atomic_t *)(&sem->count)); -+ if (tmp < -1 && (tmp & RWSEM_ACTIVE_MASK) == 0) -+ rwsem_wake(sem); -+} -+ -+/* -+ * unlock after writing -+ */ -+static inline void __up_write(struct rw_semaphore *sem) -+{ -+ if (atomic_sub_return(RWSEM_ACTIVE_WRITE_BIAS, -+ (atomic_t *)(&sem->count)) < 0) -+ rwsem_wake(sem); -+} -+ -+/* -+ * implement atomic add functionality -+ */ -+static inline void rwsem_atomic_add(int delta, struct rw_semaphore *sem) -+{ -+ atomic_add(delta, (atomic_t *)(&sem->count)); -+} -+ -+/* -+ * downgrade write lock to read lock -+ */ -+static inline void __downgrade_write(struct rw_semaphore *sem) -+{ -+ int tmp; -+ -+ tmp = atomic_add_return(-RWSEM_WAITING_BIAS, (atomic_t *)(&sem->count)); -+ if (tmp < 0) -+ rwsem_downgrade_wake(sem); -+} -+ -+static inline void __down_write_nested(struct rw_semaphore *sem, int subclass) -+{ -+ __down_write(sem); -+} -+ -+/* -+ * implement exchange and add functionality -+ */ -+static inline int rwsem_atomic_update(int delta, struct rw_semaphore *sem) -+{ -+ return atomic_add_return(delta, (atomic_t *)(&sem->count)); -+} -+ -+static inline int rwsem_is_locked(struct rw_semaphore *sem) -+{ -+ return (sem->count != 0); -+} -+ -+#endif /* __KERNEL__ */ -+#endif /* _ASM_ARM_RWSEM_H */ --- -1.7.1 diff --git a/a/content_digest b/N1/content_digest index 347af23..323d931 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,11 +1,8 @@ - "From\0Ashwin Chaugule <ashwinc@codeaurora.org>\0" + "From\0ashwinc@codeaurora.org (Ashwin Chaugule)\0" "Subject\0[RFC] [PATCH] XCHGADD ARM implementation\0" "Date\0Tue, 05 Oct 2010 17:05:55 -0400\0" - "To\0linux-arm-kernel <linux-arm-kernel@lists.infradead.org>" - linux-arm-msm@vger.kernel.org - dhowells@redhat.com - " catalin.marinas@arm.com\0" - "\01:1\0" + "To\0linux-arm-kernel@lists.infradead.org\0" + "\00:1\0" "b\0" "The following patch is the ARM implementation for RWSEM_XCHGADD_ALGORITHM.\n" "Based on David's rwsem benchmark from http://lwn.net/Articles/89191/ ,\n" @@ -23,236 +20,16 @@ "Can anyone else help to test this patch on other ARM systems ?\n" "\n" "Cheers,\n" - Ashwin - "\01:2\0" - "fn\0Optimzed-ARM-RWSEM-algorithm.patch\0" - "b\0" + "Ashwin\n" "\n" - "RWSEM implementation for ARM using atomic functions.\n" - "Heavily based on sh/include/asm/rwsem.h\n" "\n" - "Signed-off-by: Ashwin Chaugule <ashwinc@codeaurora.org>\n" - "---\n" - " arch/arm/Kconfig | 3 +-\n" - " arch/arm/include/asm/rwsem.h | 192 ++++++++++++++++++++++++++++++++++++++++++\n" - " 2 files changed, 193 insertions(+), 2 deletions(-)\n" - " create mode 100644 arch/arm/include/asm/rwsem.h\n" "\n" - "diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig\n" - "index 871838b..0149b9f 100644\n" - "--- a/arch/arm/Kconfig\n" - "+++ b/arch/arm/Kconfig\n" - "@@ -129,10 +129,9 @@ config GENERIC_LOCKBREAK\n" - " \n" - " config RWSEM_GENERIC_SPINLOCK\n" - " \tbool\n" - "-\tdefault y\n" - " \n" - " config RWSEM_XCHGADD_ALGORITHM\n" - "-\tbool\n" - "+\tdef_bool y\n" - " \n" - " config ARCH_HAS_ILOG2_U32\n" - " \tbool\n" - "diff --git a/arch/arm/include/asm/rwsem.h b/arch/arm/include/asm/rwsem.h\n" - "new file mode 100644\n" - "index 0000000..1730ee1\n" - "--- /dev/null\n" - "+++ b/arch/arm/include/asm/rwsem.h\n" - "@@ -0,0 +1,192 @@\n" - "+/* rwsem.h: R/W semaphores implemented using ARM atomic functions.\n" - "+ *\n" - "+ * Written by Ashwin Chaugule (ashwinc@codeaurora.org).\n" - "+ *\n" - "+ * Derived from arch/sh/asm/rwsem.h\n" - "+ *\n" - "+ * include/asm-arm/rwsem.h: R/W semaphores for ARM using the stuff\n" - "+ * in lib/rwsem.c.\n" - "+ *\n" - "+ * Copyright (c) 2010, Code Aurora Forum. All rights reserved.\n" - "+ *\n" - "+ * This program is free software; you can redistribute it and/or modify\n" - "+ * it under the terms of the GNU General Public License version 2 and\n" - "+ * only version 2 as published by the Free Software Foundation.\n" - "+ *\n" - "+ * This program is distributed in the hope that it will be useful,\n" - "+ * but WITHOUT ANY WARRANTY; without even the implied warranty of\n" - "+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\n" - "+ * GNU General Public License for more details.\n" - "+ *\n" - "+ * You should have received a copy of the GNU General Public License\n" - "+ * along with this program; if not, write to the Free Software\n" - "+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA\n" - "+ * 02110-1301, USA.\n" - "+ */\n" - "+\n" - "+#ifndef _ASM_ARM_RWSEM_H\n" - "+#define _ASM_ARM_RWSEM_H\n" - "+\n" - "+#ifndef _LINUX_RWSEM_H\n" - "+#error \"please don't include asm/rwsem.h directly, use linux/rwsem.h instead\"\n" - "+#endif\n" - "+\n" - "+#ifdef __KERNEL__\n" - "+#include <linux/list.h>\n" - "+#include <linux/spinlock.h>\n" - "+#include <asm/atomic.h>\n" - "+#include <asm/system.h>\n" - "+\n" - "+/*\n" - "+ * the semaphore definition\n" - "+ */\n" - "+struct rw_semaphore {\n" - "+\tlong\t\tcount;\n" - "+#define RWSEM_UNLOCKED_VALUE\t\t0x00000000\n" - "+#define RWSEM_ACTIVE_BIAS\t\t0x00000001\n" - "+#define RWSEM_ACTIVE_MASK\t\t0x0000ffff\n" - "+#define RWSEM_WAITING_BIAS\t\t(-0x00010000)\n" - "+#define RWSEM_ACTIVE_READ_BIAS\t\tRWSEM_ACTIVE_BIAS\n" - "+#define RWSEM_ACTIVE_WRITE_BIAS\t\t(RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS)\n" - "+\tspinlock_t\t\twait_lock;\n" - "+\tstruct list_head\twait_list;\n" - "+#ifdef CONFIG_DEBUG_LOCK_ALLOC\n" - "+\tstruct lockdep_map\tdep_map;\n" - "+#endif\n" - "+};\n" - "+\n" - "+#ifdef CONFIG_DEBUG_LOCK_ALLOC\n" - "+# define __RWSEM_DEP_MAP_INIT(lockname) , .dep_map = { .name = #lockname }\n" - "+#else\n" - "+# define __RWSEM_DEP_MAP_INIT(lockname)\n" - "+#endif\n" - "+\n" - "+#define __RWSEM_INITIALIZER(name) \\\n" - "+\t{ RWSEM_UNLOCKED_VALUE, __SPIN_LOCK_UNLOCKED((name).wait_lock), \\\n" - "+\t LIST_HEAD_INIT((name).wait_list) \\\n" - "+\t __RWSEM_DEP_MAP_INIT(name) }\n" - "+\n" - "+#define DECLARE_RWSEM(name)\t\t\\\n" - "+\tstruct rw_semaphore name = __RWSEM_INITIALIZER(name)\n" - "+\n" - "+extern struct rw_semaphore *rwsem_down_read_failed(struct rw_semaphore *sem);\n" - "+extern struct rw_semaphore *rwsem_down_write_failed(struct rw_semaphore *sem);\n" - "+extern struct rw_semaphore *rwsem_wake(struct rw_semaphore *sem);\n" - "+extern struct rw_semaphore *rwsem_downgrade_wake(struct rw_semaphore *sem);\n" - "+\n" - "+extern void __init_rwsem(struct rw_semaphore *sem, const char *name,\n" - "+\t\t\t struct lock_class_key *key);\n" - "+\n" - "+#define init_rwsem(sem)\t\t\t\t\\\n" - "+do {\t\t\t\t\t\t\\\n" - "+\tstatic struct lock_class_key __key;\t\\\n" - "+\t\t\t\t\t\t\\\n" - "+\t__init_rwsem((sem), #sem, &__key);\t\\\n" - "+} while (0)\n" - "+\n" - "+/*\n" - "+ * lock for reading\n" - "+ */\n" - "+static inline void __down_read(struct rw_semaphore *sem)\n" - "+{\n" - "+\tif (atomic_inc_return((atomic_t *)(&sem->count)) < 0)\n" - "+\t\trwsem_down_read_failed(sem);\n" - "+}\n" - "+\n" - "+static inline int __down_read_trylock(struct rw_semaphore *sem)\n" - "+{\n" - "+\tint tmp;\n" - "+\n" - "+\twhile ((tmp = sem->count) >= 0) {\n" - "+\t\tif (tmp == cmpxchg(&sem->count, tmp,\n" - "+\t\t\t\t tmp + RWSEM_ACTIVE_READ_BIAS)) {\n" - "+\t\t\treturn 1;\n" - "+\t\t}\n" - "+\t}\n" - "+\treturn 0;\n" - "+}\n" - "+\n" - "+/*\n" - "+ * lock for writing\n" - "+ */\n" - "+static inline void __down_write(struct rw_semaphore *sem)\n" - "+{\n" - "+\tint tmp;\n" - "+\n" - "+\ttmp = atomic_add_return(RWSEM_ACTIVE_WRITE_BIAS,\n" - "+\t\t\t\t(atomic_t *)(&sem->count));\n" - "+\tif (tmp != RWSEM_ACTIVE_WRITE_BIAS)\n" - "+\t\trwsem_down_write_failed(sem);\n" - "+}\n" - "+\n" - "+static inline int __down_write_trylock(struct rw_semaphore *sem)\n" - "+{\n" - "+\tint tmp;\n" - "+\n" - "+\ttmp = cmpxchg(&sem->count, RWSEM_UNLOCKED_VALUE,\n" - "+\t\t RWSEM_ACTIVE_WRITE_BIAS);\n" - "+\treturn tmp == RWSEM_UNLOCKED_VALUE;\n" - "+}\n" - "+\n" - "+/*\n" - "+ * unlock after reading\n" - "+ */\n" - "+static inline void __up_read(struct rw_semaphore *sem)\n" - "+{\n" - "+\tint tmp;\n" - "+\n" - "+\ttmp = atomic_dec_return((atomic_t *)(&sem->count));\n" - "+\tif (tmp < -1 && (tmp & RWSEM_ACTIVE_MASK) == 0)\n" - "+\t\trwsem_wake(sem);\n" - "+}\n" - "+\n" - "+/*\n" - "+ * unlock after writing\n" - "+ */\n" - "+static inline void __up_write(struct rw_semaphore *sem)\n" - "+{\n" - "+\tif (atomic_sub_return(RWSEM_ACTIVE_WRITE_BIAS,\n" - "+\t\t\t (atomic_t *)(&sem->count)) < 0)\n" - "+\t\trwsem_wake(sem);\n" - "+}\n" - "+\n" - "+/*\n" - "+ * implement atomic add functionality\n" - "+ */\n" - "+static inline void rwsem_atomic_add(int delta, struct rw_semaphore *sem)\n" - "+{\n" - "+\tatomic_add(delta, (atomic_t *)(&sem->count));\n" - "+}\n" - "+\n" - "+/*\n" - "+ * downgrade write lock to read lock\n" - "+ */\n" - "+static inline void __downgrade_write(struct rw_semaphore *sem)\n" - "+{\n" - "+\tint tmp;\n" - "+\n" - "+\ttmp = atomic_add_return(-RWSEM_WAITING_BIAS, (atomic_t *)(&sem->count));\n" - "+\tif (tmp < 0)\n" - "+\t\trwsem_downgrade_wake(sem);\n" - "+}\n" - "+\n" - "+static inline void __down_write_nested(struct rw_semaphore *sem, int subclass)\n" - "+{\n" - "+\t__down_write(sem);\n" - "+}\n" - "+\n" - "+/*\n" - "+ * implement exchange and add functionality\n" - "+ */\n" - "+static inline int rwsem_atomic_update(int delta, struct rw_semaphore *sem)\n" - "+{\n" - "+\treturn atomic_add_return(delta, (atomic_t *)(&sem->count));\n" - "+}\n" - "+\n" - "+static inline int rwsem_is_locked(struct rw_semaphore *sem)\n" - "+{\n" - "+\treturn (sem->count != 0);\n" - "+}\n" - "+\n" - "+#endif /* __KERNEL__ */\n" - "+#endif /* _ASM_ARM_RWSEM_H */\n" - "-- \n" - 1.7.1 + "-------------- next part --------------\n" + "A non-text attachment was scrubbed...\n" + "Name: Optimzed-ARM-RWSEM-algorithm.patch\n" + "Type: text/x-patch\n" + "Size: 5928 bytes\n" + "Desc: not available\n" + URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20101005/12e3b202/attachment.bin> -50f4f229e2f943e1cf1b48647e627b9feb39d845d768761e63e070a53300e064 +3af8be59b3083f801fa37a5ac6135ed29820aefc028b19b2c0f37fe72c9227c9
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