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From: Avi Kivity <avi@redhat.com>
To: "Nadav Har'El" <nyh@il.ibm.com>
Cc: kvm@vger.kernel.org, gleb@redhat.com
Subject: Re: [PATCH 24/28] nVMX: Handling of CR0 and CR4 modifying instructions
Date: Thu, 09 Dec 2010 15:19:17 +0200	[thread overview]
Message-ID: <4D00D755.5070908@redhat.com> (raw)
In-Reply-To: <201012081712.oB8HCFak008814@rice.haifa.ibm.com>

On 12/08/2010 07:12 PM, Nadav Har'El wrote:
> When L2 tries to modify CR0 or CR4 (with mov or clts), and modifies a bit
> which L1 asked to shadow (via CR[04]_GUEST_HOST_MASK), we already do the right
> thing: we let L1 handle the trap (see nested_vmx_exit_handled_cr() in a
> previous patch).
> When L2 modifies bits that L1 doesn't care about, we let it think (via
> CR[04]_READ_SHADOW) that it did these modifications, while only changing
> (in GUEST_CR[04]) the bits that L0 doesn't shadow.
>
> This is needed for corect handling of CR0.TS for lazy FPU loading: L0 may
> want to leave TS on, while pretending to allow the guest to change it.
>
> Signed-off-by: Nadav Har'El<nyh@il.ibm.com>
> ---
>   arch/x86/kvm/vmx.c |   54 ++++++++++++++++++++++++++++++++++++++++---
>   1 file changed, 51 insertions(+), 3 deletions(-)
>
> --- .before/arch/x86/kvm/vmx.c	2010-12-08 18:56:51.000000000 +0200
> +++ .after/arch/x86/kvm/vmx.c	2010-12-08 18:56:51.000000000 +0200
> @@ -3877,6 +3877,54 @@ static void complete_insn_gp(struct kvm_
>   		skip_emulated_instruction(vcpu);
>   }
>
> +/* called to set cr0 as approriate for a mov-to-cr0 exit. */
> +static int handle_set_cr0(struct kvm_vcpu *vcpu, unsigned long val)
> +{
> +	if (is_guest_mode(vcpu)) {
> +		/*
> +		 * We get here when L2 changed cr0 in a way that did not change
> +		 * any of L1's shadowed bits (see nested_vmx_exit_handled_cr),
> +		 * but did change L0 shadowed bits. This can currently happen
> +		 * with the TS bit: L0 may want to leave TS on (for lazy fpu
> +		 * loading) while pretending to allow the guest to change it.
> +		 */
> +		vmcs_writel(GUEST_CR0,
> +		   (val&  vcpu->arch.cr0_guest_owned_bits) |
> +		   (vmcs_readl(GUEST_CR0)&  ~vcpu->arch.cr0_guest_owned_bits));
> +		vmcs_writel(CR0_READ_SHADOW, val);
> +		vcpu->arch.cr0 = val;
> +		return 0;
> +	} else
> +		return kvm_set_cr0(vcpu, val);
> +}

Easier way: update val to reflect the change, and call 
kvm_set_cr0(val).  This allows any side effects by kvm_set_cr4() to take 
place (for example the guest may allow the nested guest to change 
cr0.pg, and we need to kvm_set_cr0() to make note of that).

> +
> +static int handle_set_cr4(struct kvm_vcpu *vcpu, unsigned long val)
> +{
> +	if (is_guest_mode(vcpu)) {
> +		vmcs_writel(GUEST_CR4,
> +		  (val&  vcpu->arch.cr4_guest_owned_bits) |
> +		  (vmcs_readl(GUEST_CR4)&  ~vcpu->arch.cr4_guest_owned_bits));
> +		vmcs_writel(CR4_READ_SHADOW, val);
> +		vcpu->arch.cr4 = val;
> +		return 0;
> +	} else
> +		return kvm_set_cr4(vcpu, val);
> +}

Ditto.

> +
> +
> +/* called to set cr0 as approriate for clts instruction exit. */
> +static void handle_clts(struct kvm_vcpu *vcpu)
> +{
> +	if (is_guest_mode(vcpu)) {
> +		/* As in handle_set_cr0(), we can't call vmx_set_cr0 here */
> +		vmcs_writel(GUEST_CR0, vmcs_readl(GUEST_CR0)&  ~X86_CR0_TS);
> +		vmcs_writel(CR0_READ_SHADOW,
> +			vmcs_readl(CR0_READ_SHADOW)&  ~X86_CR0_TS);
> +		vcpu->arch.cr0&= ~X86_CR0_TS;
> +	} else
> +		vmx_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~X86_CR0_TS));
> +}

Here, too.

-- 
error compiling committee.c: too many arguments to function


  reply	other threads:[~2010-12-09 13:19 UTC|newest]

Thread overview: 40+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2010-12-08 16:59 [PATCH 0/28] nVMX: Nested VMX, v7 Nadav Har'El
2010-12-08 17:00 ` [PATCH 01/28] nVMX: Add "nested" module option to vmx.c Nadav Har'El
2010-12-08 17:00 ` [PATCH 02/28] nVMX: Add VMX and SVM to list of supported cpuid features Nadav Har'El
2010-12-09 11:38   ` Joerg Roedel
2010-12-15 13:25     ` Nadav Har'El
2010-12-08 17:01 ` [PATCH 03/28] nVMX: Implement VMXON and VMXOFF Nadav Har'El
2010-12-08 17:02 ` [PATCH 04/28] nVMX: Allow setting the VMXE bit in CR4 Nadav Har'El
2010-12-08 17:02 ` [PATCH 05/28] nVMX: Introduce vmcs12: a VMCS structure for L1 Nadav Har'El
2010-12-08 17:03 ` [PATCH 06/28] nVMX: Implement reading and writing of VMX MSRs Nadav Har'El
2010-12-09 11:04   ` Avi Kivity
2010-12-08 17:03 ` [PATCH 07/28] nVMX: Decoding memory operands of VMX instructions Nadav Har'El
2010-12-09 11:08   ` Avi Kivity
2010-12-08 17:04 ` [PATCH 08/28] nVMX: Hold a vmcs02 for each vmcs12 Nadav Har'El
2010-12-09 12:41   ` Avi Kivity
2010-12-08 17:04 ` [PATCH 09/28] nVMX: Add VMCS fields to the vmcs12 Nadav Har'El
2010-12-09 12:43   ` Avi Kivity
2010-12-10 12:10     ` Nadav Har'El
2010-12-08 17:05 ` [PATCH 10/28] nVMX: Success/failure of VMX instructions Nadav Har'El
2010-12-08 17:05 ` [PATCH 11/28] nVMX: Implement VMCLEAR Nadav Har'El
2010-12-08 17:06 ` [PATCH 12/28] nVMX: Implement VMPTRLD Nadav Har'El
2010-12-08 17:06 ` [PATCH 13/28] nVMX: Implement VMPTRST Nadav Har'El
2010-12-08 17:07 ` [PATCH 14/28] nVMX: Implement VMREAD and VMWRITE Nadav Har'El
2010-12-08 17:07 ` [PATCH 15/28] nVMX: Prepare vmcs02 from vmcs01 and vmcs12 Nadav Har'El
2010-12-08 17:08 ` [PATCH 16/28] nVMX: Move register-syncing to a function Nadav Har'El
2010-12-08 17:08 ` [PATCH 17/28] nVMX: Implement VMLAUNCH and VMRESUME Nadav Har'El
2010-12-08 17:09 ` [PATCH 18/28] nVMX: No need for handle_vmx_insn function any more Nadav Har'El
2010-12-08 17:09 ` [PATCH 19/28] nVMX: Exiting from L2 to L1 Nadav Har'El
2010-12-09 12:55   ` Avi Kivity
2010-12-08 17:10 ` [PATCH 20/28] nVMX: Deciding if L0 or L1 should handle an L2 exit Nadav Har'El
2010-12-08 17:10 ` [PATCH 21/28] nVMX: Correct handling of interrupt injection Nadav Har'El
2010-12-08 17:11 ` [PATCH 22/28] nVMX: Correct handling of exception injection Nadav Har'El
2010-12-08 17:11 ` [PATCH 23/28] nVMX: Correct handling of idt vectoring info Nadav Har'El
2010-12-08 17:12 ` [PATCH 24/28] nVMX: Handling of CR0 and CR4 modifying instructions Nadav Har'El
2010-12-09 13:19   ` Avi Kivity [this message]
2010-12-08 17:12 ` [PATCH 25/28] nVMX: Further fixes for lazy FPU loading Nadav Har'El
2010-12-09 13:05   ` Avi Kivity
2010-12-08 17:13 ` [PATCH 26/28] nVMX: Additional TSC-offset handling Nadav Har'El
2010-12-08 17:13 ` [PATCH 27/28] nVMX: Miscellenous small corrections Nadav Har'El
2010-12-08 17:14 ` [PATCH 28/28] nVMX: Documentation Nadav Har'El
2010-12-09 12:44 ` [PATCH 0/28] nVMX: Nested VMX, v7 Avi Kivity

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