From: "H. Peter Anvin" <hpa@zytor.com>
To: Tejun Heo <tj@kernel.org>
Cc: Shaohua Li <shaohua.li@intel.com>,
Sam Ravnborg <sam@ravnborg.org>,
lkml <linux-kernel@vger.kernel.org>,
Andrew Morton <akpm@linux-foundation.org>,
eric.dumazet@gmail.com, linux-arch@vger.kernel.org
Subject: Re: [PATCH RESEND percpu#for-next] percpu: align percpu readmostly subsection to cacheline
Date: Mon, 27 Dec 2010 12:17:57 -0800 [thread overview]
Message-ID: <4D18F475.8090604@zytor.com> (raw)
In-Reply-To: <20101227133719.GD488@htj.dyndns.org>
On 12/27/2010 05:37 AM, Tejun Heo wrote:
> Currently percpu readmostly subsection may share cachelines with other
> percpu subsections which may result in unnecessary cacheline bounce
> and performance degradation.
>
> This patch adds @cacheline parameter to PERCPU() and PERCPU_VADDR()
> linker macros, makes each arch linker scripts specify its cacheline
> size and use it to align percpu subsections.
>
> This is based on Shaohua's x86 only patch.
>
> Signed-off-by: Tejun Heo <tj@kernel.org>
> Cc: Shaohua Li <shaohua.li@intel.com>
> ---
> Shaohua, can you please verify this achieves the same result? If no
> one objects, I'll route it through the percpu tree.
>
For x86:
Acked-by: H. Peter Anvin <hpa@zytor.com>
next prev parent reply other threads:[~2010-12-27 20:18 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-12-27 13:37 [PATCH RESEND percpu#for-next] percpu: align percpu readmostly subsection to cacheline Tejun Heo
2010-12-27 13:37 ` Tejun Heo
2010-12-27 20:17 ` H. Peter Anvin [this message]
2010-12-27 20:43 ` Sam Ravnborg
2010-12-27 21:03 ` H. Peter Anvin
2010-12-28 11:18 ` Tejun Heo
2010-12-28 11:33 ` [PATCH] alpha: use L1_CACHE_BYTES for cacheline size in the linker script Tejun Heo
2011-01-25 13:28 ` Tejun Heo
2010-12-28 0:48 ` [PATCH RESEND percpu#for-next] percpu: align percpu readmostly subsection to cacheline Shaohua Li
2011-01-25 13:32 ` Tejun Heo
2011-01-25 13:32 ` Tejun Heo
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