From: Jeff Garzik <jeff@garzik.org>
To: 羅秉鈞 <luobingjiun@gmail.com>
Cc: linux-ide@vger.kernel.org
Subject: Re: Why is only one command issue per time in AHCI driver?
Date: Thu, 13 Jan 2011 12:46:46 -0500 [thread overview]
Message-ID: <4D2F3A86.3010503@garzik.org> (raw)
In-Reply-To: <AANLkTin5=NiZn6ZWZ=r-XS0v_Utrf6dpTb_YzCay-PJM@mail.gmail.com>
On 01/13/2011 05:52 AM, 羅秉鈞 wrote:
> Hello,
>
> Inside ahci_qc_issue() function, I see that driver always write one bit
> to Px.CI register even enable the NCQ.
>
> AHCI allows to fire 32 commands at one time and AHCI driver also
> claims itself able to queue up to 31 commands.
>
> Inside ahci.c :
> static struct scsi_host_template ahci_sht = {
> ATA_NCQ_SHT(DRV_NAME),
> .can_queue = AHCI_MAX_CMDS - 1,
> ............
>
> Why upper layer(Block or SCSI layer) does not fill up as many as possible
> commands into Command List before sending the commands out
> (Write to Px.CI register)?
The driver successfully executes up to 31 commands at a time, in paralle.
We submit one command at a time to hardware because the block layer
passes commands to us one at a time.
Jeff
next prev parent reply other threads:[~2011-01-13 17:46 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-01-13 10:52 Why is only one command issue per time in AHCI driver? 羅秉鈞
2011-01-13 17:46 ` Jeff Garzik [this message]
2011-01-14 1:06 ` 羅秉鈞
2011-01-14 5:47 ` Robert Hancock
2011-01-17 1:19 ` BingJiun Luo
2011-01-18 7:56 ` Seed
2011-01-18 8:46 ` Jeff Garzik
2011-01-18 14:43 ` Robert Hancock
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