[PATCH]: blacklist new AMD CPUID bits for PV domains

[Andre Przywara <andre.przywara@amd.com>]

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Hi,

there are some new CPUID bits (and leaves) which Dom0 and PV domains 
should not see to avoid trouble, since we don't emulate the features. 
The most prominent one is a topology leaf, which contains information 
specific to the physical CPU, not the virtual one. To avoid confusion 
(and possibly crashes) due to a confused Dom0 scheduler simply disable 
these bits.

Signed-off-by: Andre Przywara <andre.przywara@amd.com>

-- 
Andre Przywara
AMD-Operating System Research Center (OSRC), Dresden, Germany

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diff -r 003acf02d416 xen/arch/x86/traps.c
--- a/xen/arch/x86/traps.c	Thu Jan 20 17:04:06 2011 +0000
+++ b/xen/arch/x86/traps.c	Fri Jan 21 13:51:38 2011 +0100
@@ -802,11 +802,16 @@
         __clear_bit(X86_FEATURE_IBS % 32, &c);
         __clear_bit(X86_FEATURE_SKINIT % 32, &c);
         __clear_bit(X86_FEATURE_WDT % 32, &c);
+        __clear_bit(X86_FEATURE_LWP % 32, &c);
+        __clear_bit(X86_FEATURE_NODEID_MSR % 32, &c);
+        __clear_bit(X86_FEATURE_TOPOEXT % 32, &c);
         break;
     case 5: /* MONITOR/MWAIT */
     case 0xa: /* Architectural Performance Monitor Features */
     case 0x8000000a: /* SVM revision and features */
     case 0x8000001b: /* Instruction Based Sampling */
+    case 0x8000001c: /* Light Weight Profiling */
+    case 0x8000001e: /* Extended topology reporting */
         a = b = c = d = 0;
         break;
     default:

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