From mboxrd@z Thu Jan 1 00:00:00 1970 From: Andre Przywara Subject: [PATCH 1/2] xen/pv: blacklist inappropriate new CPUID bits Date: Wed, 26 Jan 2011 14:48:36 +0100 Message-ID: <4D402634.40004@amd.com> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="------------020906040901070302070401" Return-path: List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xensource.com Errors-To: xen-devel-bounces@lists.xensource.com To: Keir Fraser , xen-devel List-Id: xen-devel@lists.xenproject.org --------------020906040901070302070401 Content-Type: text/plain; charset="ISO-8859-1"; format=flowed Content-Transfer-Encoding: 7bit Hi, there are some new CPUID bits (and leaves) which Dom0 and PV domains should not see to avoid trouble, since we don't emulate the features. This affects 2.6.37+ kernels on upcoming CPUs. The most prominent one is a topology leaf, which contains information specific to the physical CPU, not the virtual one. To avoid confusion (and possibly crashes) due to a confused Dom0 scheduler simply disable these bits. Version 2 including DomU support. Signed-off-by: Andre Przywara -- Andre Przywara AMD-Operating System Research Center (OSRC), Dresden, Germany --------------020906040901070302070401 Content-Type: text/x-patch; name="cpuid_blacklist.patch" Content-Transfer-Encoding: 7bit Content-Disposition: inline; filename="cpuid_blacklist.patch" Content-Description: cpuid_blacklist.patch commit 2501d1aee52947f26efbb18ecae79f8b4d9da181 Author: Andre Przywara Date: Wed Jan 26 11:48:05 2011 +0100 disable CPUID feature bits not emulated to guests diff --git a/tools/libxc/xc_cpuid_x86.c b/tools/libxc/xc_cpuid_x86.c index 724ed0f..407a535 100644 --- a/tools/libxc/xc_cpuid_x86.c +++ b/tools/libxc/xc_cpuid_x86.c @@ -427,12 +427,17 @@ static void xc_cpuid_pv_policy( clear_bit(X86_FEATURE_IBS, regs[2]); clear_bit(X86_FEATURE_SKINIT, regs[2]); clear_bit(X86_FEATURE_WDT, regs[2]); + clear_bit(X86_FEATURE_LWP, regs[2]); + clear_bit(X86_FEATURE_NODEID_MSR, regs[2]); + clear_bit(X86_FEATURE_TOPOEXT, regs[2]); break; case 5: /* MONITOR/MWAIT */ case 0xa: /* Architectural Performance Monitor Features */ case 0xd: /* XSAVE */ case 0x8000000a: /* SVM revision and features */ case 0x8000001b: /* Instruction Based Sampling */ + case 0x8000001c: /* Light Weight Profiling */ + case 0x8000001e: /* Extended topology reporting */ regs[0] = regs[1] = regs[2] = regs[3] = 0; break; } diff --git a/xen/arch/x86/traps.c b/xen/arch/x86/traps.c index 75d305f..97e3dc4 100644 --- a/xen/arch/x86/traps.c +++ b/xen/arch/x86/traps.c @@ -802,11 +802,16 @@ static void pv_cpuid(struct cpu_user_regs *regs) __clear_bit(X86_FEATURE_IBS % 32, &c); __clear_bit(X86_FEATURE_SKINIT % 32, &c); __clear_bit(X86_FEATURE_WDT % 32, &c); + __clear_bit(X86_FEATURE_LWP % 32, &c); + __clear_bit(X86_FEATURE_NODEID_MSR % 32, &c); + __clear_bit(X86_FEATURE_TOPOEXT % 32, &c); break; case 5: /* MONITOR/MWAIT */ case 0xa: /* Architectural Performance Monitor Features */ case 0x8000000a: /* SVM revision and features */ case 0x8000001b: /* Instruction Based Sampling */ + case 0x8000001c: /* Light Weight Profiling */ + case 0x8000001e: /* Extended topology reporting */ a = b = c = d = 0; break; default: --------------020906040901070302070401 Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel --------------020906040901070302070401--