From: prabhum@msys-tech.com (prabhu)
To: kernelnewbies@lists.kernelnewbies.org
Subject: How to identity processor architecture
Date: Thu, 27 Jan 2011 12:37:55 +0530 [thread overview]
Message-ID: <4D4119CB.5000906@msys-tech.com> (raw)
In-Reply-To: <AANLkTikxZV8EiBMwgi2qBvFRvn=Tu3L5xn_wjofuwZGY@mail.gmail.com>
Hi Mulyadi,
> On Thu, Jan 27, 2011 at 13:40, prabhu <prabhum@msys-tech.com> wrote:
>
>> No, because 32bit code will tell the datatype size and i think pointer
>> variable depends on architecture.
>> So 64 bit processor needs 64 address line to point the data location. So
>> pointer variable needs to be 8 byte.
>>
>
> Please don't top post and please use the new list address, ok? :)
>
Sure, Thanks for your reply.
> IMO, I second your opinion. And as addition, I think it's worth to
> check /proc/cpuinfo too in "address sizes" field
>
I am getting below output for /proc/cpuinfo . I hope *cpu family : 6
*means x86 family(32 bit processor). What if its 64 bit processor. ( I
dont have system to check this.)
processor : 0
vendor_id : GenuineIntel
*cpu family : 6*
model : 15
model name : Intel(R) Pentium(R) Dual CPU E2160 @ 1.80GHz
stepping : 13
cpu MHz : 1200.000
cache size : 1024 KB
physical id : 0
siblings : 2
core id : 0
cpu cores : 2
apicid : 0
initial apicid : 0
fdiv_bug : no
hlt_bug : no
f00f_bug : no
coma_bug : no
fpu : yes
fpu_exception : yes
cpuid level : 10
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic mtrr pge mca cmov pat
pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe nx lm constant_tsc
arch_perfmon pebs bts pni dtes64 monitor ds_cpl est tm2 ssse3 cx16 xtpr
pdcm lahf_lm
bogomips : 3591.05
clflush size : 64
power management:
processor : 1
vendor_id : GenuineIntel
*cpu family : 6*
model : 15
model name : Intel(R) Pentium(R) Dual CPU E2160 @ 1.80GHz
stepping : 13
cpu MHz : 1200.000
cache size : 1024 KB
physical id : 0
siblings : 2
core id : 1
cpu cores : 2
apicid : 1
initial apicid : 1
fdiv_bug : no
hlt_bug : no
f00f_bug : no
coma_bug : no
fpu : yes
fpu_exception : yes
cpuid level : 10
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic mtrr pge mca cmov pat
pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe nx lm constant_tsc
arch_perfmon pebs bts pni dtes64 monitor ds_cpl est tm2 ssse3 cx16 xtpr
pdcm lahf_lm
bogomips : 3590.97
clflush size : 64
power management:
> NB: I was thinking, if in x64, it is operating in full 32 bit mode
> (not hybrid one), it is supposed to yield 32 bit address too, right?
>
I'm sorry . I have no idea about this.
Thanks,
Prabhu
next prev parent reply other threads:[~2011-01-27 7:07 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-01-27 6:07 How to identity processor architecture prabhu
2011-01-27 6:26 ` Enrico Granata
2011-01-27 6:31 ` arun kumar
2011-01-27 6:40 ` prabhu
2011-01-27 6:45 ` Mulyadi Santosa
2011-01-27 6:54 ` Enrico Granata
2011-01-27 7:15 ` dharmvir kumar
2011-01-27 7:24 ` Mandeep Sandhu
2011-01-27 8:20 ` prabhu
2011-01-27 8:22 ` Enrico Granata
2011-01-27 9:53 ` prabhu
2011-01-27 11:15 ` Henry Gebhardt
2011-01-27 11:32 ` Thirugnanam Balamurugan
2011-01-27 11:44 ` Pravin Shedage
2011-01-27 12:33 ` prabhu
2011-01-27 9:23 ` Busybox for powerpc doesnt compile Giriprasad Deviprasad
2011-01-27 10:11 ` yy Hong
2011-01-27 13:47 ` Anuz Pratap Singh Tomar
2011-01-29 5:50 ` Giriprasad Deviprasad
2011-01-30 13:23 ` Giriprasad Deviprasad
2011-01-27 7:07 ` prabhu [this message]
2011-01-27 7:13 ` How to identity processor architecture Mulyadi Santosa
2011-01-27 19:27 ` mindentropy
2011-01-27 20:01 ` Denis Kirjanov
-- strict thread matches above, loose matches on Subject: below --
2011-01-27 3:28 Added about new kernel on old distro (was Re: most likely, i'll be giving a kernel talk at ottawa LUG next week) Mulyadi Santosa
2011-01-27 6:09 ` How to identity processor architecture prabhu
2011-01-26 18:08 most likely, i'll be giving a kernel talk at ottawa LUG next week Robert P. J. Day
2011-01-27 6:17 ` How to identity processor architecture prabhu
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