From mboxrd@z Thu Jan 1 00:00:00 1970 Message-ID: <4D49D608.5020006@domain.hid> Date: Wed, 02 Feb 2011 23:09:12 +0100 From: Gilles Chanteperdrix MIME-Version: 1.0 References: <4D49CF24.9080700@domain.hid> In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Subject: Re: [Xenomai-help] I-pipe clock source change and MMC issues (AT91) List-Id: Help regarding installation and common use of Xenomai List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: at91_enthus Cc: xenomai@xenomai.org at91_enthus wrote: > > > On Wed, Feb 2, 2011 at 3:39 PM, Gilles Chanteperdrix > > wrote: > > at91_enthus wrote: > > Hi. > > > > In order to get better accuracy with Xenomai, I modified the I-pipe > > timebase (MCK divider) in arch/arm.mach-at91/at91_ipipe_time.c. > > Unfortunately, I cannot mount the rootfs on the MMC, since the MMC > > controller is no longer functioning. I tried to change TCx in kernel > > configuration to no avail. > > When I switch back to a timebase of 1 MHz, the MMC works fine. > > The thing is that we are a bit tight on AT91. A 16 bits counter is used > for both the timer and the tsc emulation, and this tsc must be refreshed > at least once before it wraps. The problem is that since it is a 16 bits > counter, it wraps really fast, on my AT91SAM9263 it wraps in 20 ms, and > since the Linux default period is 10ms we are actually quite close to > the limit. > > Anyway, trying to get a better accuracy than 1us is kind of useless on > AT91, since even reading this counter takes more than 1us. So, you are > not in fact improving anything. The 1MHz is even a bit overkill. On the other hand, the AT91SAM9G20 may be running at a better frequency. But with latencies in the order of tens of microseconds, having a better accuracy than 1us still does not make really much sense. Why do you need this accuracy? -- Gilles.