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From: Jan Kiszka <jan.kiszka@siemens.com>
To: Alexander Graf <agraf@suse.de>
Cc: Kevin Wolf <kwolf@redhat.com>,
	Joerg Roedel <Joerg.Roedel@amd.com>,
	qemu-devel Developers <qemu-devel@nongnu.org>,
	Sebastian Herbszt <herbszt@gmx.de>
Subject: [Qemu-devel] Re: [PATCH 7/7] ahci: work around bug with level interrupts
Date: Thu, 03 Feb 2011 12:19:50 +0100	[thread overview]
Message-ID: <4D4A8F56.9030609@siemens.com> (raw)
In-Reply-To: <4286FBFA-E222-4F74-80F3-DAFAAB0AABAC@suse.de>

On 2011-02-03 11:38, Alexander Graf wrote:
> 
> On 03.02.2011, at 11:30, Jan Kiszka wrote:
> 
>> On 2011-02-02 15:39, Alexander Graf wrote:
>>> When using level based interrupts, the interrupt is treated the same as an
>>> edge triggered one: leaving the line up does not retrigger the interrupt.
>>>
>>> In fact, when not lowering the line, we won't ever get a new interrupt inside
>>> the guest. So let's always retrigger an interrupt as soon as the OS ack'ed
>>> something on the device. This way we're sure the guest doesn't starve on
>>> interrupts until someone fixes the actual interrupt path.
>>>
>>> Signed-off-by: Alexander Graf <agraf@suse.de>
>>>
>>> ---
>>>
>>> v2 -> v3:
>>>
>>>  - add comment about the interrupt hack
>>>
>>> v3 -> v4:
>>>
>>>  - embed non-workaround version in the code
>>> ---
>>> hw/ide/ahci.c |   13 +++++++++++++
>>> 1 files changed, 13 insertions(+), 0 deletions(-)
>>>
>>> diff --git a/hw/ide/ahci.c b/hw/ide/ahci.c
>>> index 98bdf70..10377ca 100644
>>> --- a/hw/ide/ahci.c
>>> +++ b/hw/ide/ahci.c
>>> @@ -152,12 +152,25 @@ static void ahci_check_irq(AHCIState *s)
>>>         }
>>>     }
>>>
>>> +    /* XXX We always lower the interrupt line here because of a bug with
>>> +           interrupt handling in Qemu. When leaving a line up, the interrupt
>>> +           does not get retriggered automatically currently. Once that bug is
>>> +           fixed, this workaround is not necessary anymore and we only need to
>>> +           lower in the else branch. */
>>> +#if 0
>>>     if (s->control_regs.irqstatus &&
>>>         (s->control_regs.ghc & HOST_CTL_IRQ_EN)) {
>>>             ahci_irq_raise(s, NULL);
>>>     } else {
>>>         ahci_irq_lower(s, NULL);
>>>     }
>>> +#else
>>> +    ahci_irq_lower(s, NULL);
>>> +    if (s->control_regs.irqstatus &&
>>> +        (s->control_regs.ghc & HOST_CTL_IRQ_EN)) {
>>> +            ahci_irq_raise(s, NULL);
>>> +    }
>>> +#endif
>>> }
>>>
>>> static void ahci_trigger_irq(AHCIState *s, AHCIDevice *d,
>>
>> Could you check if this quick-hack obsoletes the above hack?
>>
>> I was hoping it has some influence on our 64-bit Windows issue, but it
>> hasn't, or it's still buggy, or both. However, its intention is to
>> reassert still pending level-triggered IRQs on APIC EOI. This logic is
>> missing in the user space model but exists in KVM's kernel model (I was
>> asking for a test against the latter but unfortunately did not receive
>> an answer - I bet you already don't need your patch over qemu-kvm).
> 
> Oh, sorry for not replying there. I work on qemu.git, so the in-kernel apic is out of question for testing. I tried merging qemu-kvm.git and qemu.git several times and every time just wasted a few hours of my life, so I gave up on testing things on qemu-kvm.git.

Ah, I see. Marcelo recently merged back, resolving the tricky bits, and
now it should be much easier. Anyway.

> 
> The patch works though. If everybody agrees to take it, we can drop patch 7/7 of my ahci set.

Cool! I've a few more minor things to clean up here and will sent that
as a series later today, also for 0.14.

Jan

-- 
Siemens AG, Corporate Technology, CT T DE IT 1
Corporate Competence Center Embedded Linux

  reply	other threads:[~2011-02-03 11:19 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-02-01 14:51 [Qemu-devel] [PATCH 0/7] Some more AHCI work v2 Alexander Graf
2011-02-01 14:51 ` [Qemu-devel] [PATCH 1/7] ahci: split ICH9 from core Alexander Graf
2011-02-01 14:51 ` [Qemu-devel] [PATCH 2/7] ahci: add license header in ahci.h Alexander Graf
2011-02-01 14:51 ` [Qemu-devel] [PATCH 3/7] ahci: split ICH and AHCI even more Alexander Graf
2011-02-01 14:51 ` [Qemu-devel] [PATCH 4/7] ahci: send init d2h fis on fis enable Alexander Graf
2011-02-01 14:51 ` [Qemu-devel] [PATCH 5/7] ahci: Implement HBA reset Alexander Graf
2011-02-01 14:51 ` [Qemu-devel] [PATCH 6/7] ahci: make number of ports runtime determined Alexander Graf
2011-02-01 14:51 ` [Qemu-devel] [PATCH 7/7] ahci: work around bug with level interrupts Alexander Graf
2011-02-01 16:34   ` Aurelien Jarno
2011-02-01 16:53     ` Alexander Graf
2011-02-01 17:06       ` Aurelien Jarno
2011-02-01 17:10         ` Alexander Graf
2011-02-01 17:15           ` Aurelien Jarno
2011-02-01 18:35 ` Alexander Graf
2011-02-01 19:58   ` Aurelien Jarno
2011-02-01 20:10     ` Alexander Graf
2011-02-02  9:26       ` Kevin Wolf
2011-02-02 14:39         ` Alexander Graf
2011-02-02 14:39 ` Alexander Graf
2011-02-03 10:30   ` [Qemu-devel] " Jan Kiszka
2011-02-03 10:38     ` Alexander Graf
2011-02-03 11:19       ` Jan Kiszka [this message]
2011-02-07 10:56 ` [Qemu-devel] Re: [PATCH 0/7] Some more AHCI work v2 Kevin Wolf
2011-02-07 11:44   ` Jan Kiszka
2011-02-07 11:52     ` Kevin Wolf

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