From: Renaud Barbier <renaud.barbier@ge.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] P1022 eTSEC
Date: Wed, 09 Feb 2011 20:21:44 +0000 [thread overview]
Message-ID: <4D52F758.6080906@ge.com> (raw)
In-Reply-To: <20110209195611.9155914B9A37@gemini.denx.de>
We have a system with a P1022 connected to a 5461S in SGMII mode.
In order to make it work in SGMII mode, I set TBI ANA to 0x4001 as per
AN3869. Note that those bit are described as reserved in the P1022 doc
that I have.
I was then able to transfer data at 100/1000 (10 not tested).
As per AN3869 a value of 0x1a0 is for 1000BASE-X.
Looking at the tsec driver (drivers/net/tsec.c), one can see:
#define TBIANA_SETTINGS ( \
TBIANA_ASYMMETRIC_PAUSE \
| TBIANA_SYMMETRIC_PAUSE \
| TBIANA_FULL_DUPLEX \
)
==> 0x1a0
if (regs->ecntrl & ECNTRL_SGMII_MODE)
tsec_configure_serdes(priv);
That would mean the TBI ANA is not set correctly when SGMII
is reported.
Please can you verify this.
Cheers.
next prev parent reply other threads:[~2011-02-09 20:21 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-02-08 13:43 [U-Boot] [Nios] Pull Request Scott McNutt
2011-02-09 19:56 ` Wolfgang Denk
2011-02-09 20:21 ` Renaud Barbier [this message]
2011-02-09 20:23 ` [U-Boot] P1022 eTSEC Renaud Barbier
2011-02-09 22:01 ` Peter Tyser
2011-02-10 11:28 ` Renaud Barbier
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