From mboxrd@z Thu Jan 1 00:00:00 1970 From: Wei Huang Subject: [PATCH 0/5][RFC] lwp: adding support for AMD lightweight profiling Date: Fri, 11 Feb 2011 10:28:10 -0600 Message-ID: <4D55639A.5040506@amd.com> Reply-To: Wei.Huang2@amd.com Mime-Version: 1.0 Content-Type: text/plain; charset="ISO-8859-1"; format=flowed Content-Transfer-Encoding: 7bit Return-path: List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xensource.com Errors-To: xen-devel-bounces@lists.xensource.com To: "'xen-devel@lists.xensource.com'" , Keir Fraser , "Wei, Gang" List-Id: xen-devel@lists.xenproject.org Hi, The following patch set is to enable lightweight profiling for AMD CPUs. Note that they are targeted at Xen-4.1 beyond. But I am posting them now for comments. The changes are summarized as the following: 1. The patches extend CPUID leaves (in tools) from 0x80000008 to 0x8000001c. The idea of this change was borrowed from Christoph Egger's nested virtualization tools patch. 2. Because TS doesn't track LWP xsave area, we have to save and restore this area on every domain_context_switch. For this purpose, we add a new parameter in xsave/xrstor function to specify the save/restore area in EAX:EDX. We check some bits (xsave_read.hdr and lwp_cfg MSR) to avoid unnecessary save/restore. A similar idea was proposed to Linux kernel by Hans Rosenfeld. 3. Inside svm.c, we keep track of lwp_cfg MSR for various purposes. In comparison, lwp_cbaddr is handed by xsave/xrstor automatically. Please comment. I would start to submit a formal one after 4.1 is closed. Thanks, -Wei