[Qemu-devel] ACPI table loading [was: q35 chipset support for native pci express support]

[Michael Tokarev <mjt@tls.msk.ru>]

16.03.2011 12:29, Isaku Yamahata wrote:
> This patch series adds basic q35 chipset support for native pci express
> support. Some bios related patches are still needed.
> For those who want to try it, the following repo is avaiable.
> (vgabios doesn't need patches, so use the upstream one)
> 
> git clone http://people.valinux.co.jp/~yamahata/qemu/q35/20110316/qemu
> git clone http://people.valinux.co.jp/~yamahata/qemu/q35/20110316/seabios
> 
> Example:
> qemu-system-x86_64 ... -M pc_q35 -acpitable 'load_header,data=roms/seabios/src/q35-acpi-dsdt.aml

My question is unrelated to your q35 work, but I have a suggestion
here: can we avoid this "load_header" thing please?  I hacked this
area locally a while back while trying to run OEM-licensed windows
with a SLIC table in BIOS, and wanted to come with alternative
approach.  Now when you reminded me that again I'd rather finish
that old thing and post a real patch...

Here's my "idea".  First, if there's no other options provided
except of data=..., just treat it as "headerful", ie, complete with
the header.  Or alternatively (or at the same time), recognize
"file=" the same way as "data=".  We can go even further and load
file/data first and patch in the other header field if specified,
so it'll be possible to overwrite only certain parts of the header
but load the rest of the table (complete with all other headers)
from a file.

Does it make sense?



> 
> 
> The motivation is to support newer hardware features because
> piix chipset is very old.
> Especially I have PCI express in mind and this is the basic infrastructure
> for PCI express hot plug and PCI express native direct attach.
> I can boot Linux with PCIe MMCONFIG with APIC mode pci interrupt routing.
> I haven't tested other OSes.
> 
> The patch series consist as following
> 
> - Firstly, some PCI patches which introduce helper functions and so on.
> - Then, PC initialization related patches which simplifies pc board
>   initialization, pc_init1().
> - Thirdly, factoring out the logics which are common to the existing
>    piix and q35. ie. smram, pam and acpi logic.
> - At last introduce q35 chipset emulator which is able to handle
>   pci express natively.
> 
> Thanks,
> 
> Change from v7:
> - heavily reorganized and improved.
> - factoring out code duplication.
> - improved irq routing fully.
> 
> Changes from split out piix specific part from pc emulator. V6
> - rebased to 731c54f86988d3f28268f184fabfe9b2a32fb5d3
> - PCIe MMCONFIG
> - pci bridge related fixes
> - chipset emulator works.
> - IOAPIC patches
> 
> Changes from v5:
> - rebased 0.11.0-rc0
> - changed qemu_system_powerdown_register() to call
>   qemu_system_shutdown_request() if qemu_system_shutdown() is called before
>   registering.
> 
> Changes from v4:
> - fix version number.
> - rebased anthony's staging tree whose latest change set is
>   62969268f876c547ee64da6d60e0f363e0f1df75
> 
> Changes from v3:
> - move qemu_system_powerdown() in vl.c and more generic
>   following the comment by Marcelo Tosatti <mtosatti@redhat.com>
>   acpi.c: make qemu_system_powerdown() piix independent.
> - define cmos_set_s3_resume_init() and cmos_set_s3_resume() in pc.c
>   even if TARGET_I386 isn't defined following th ecommit by
>   Paolo Bonzini <bonzini@gnu.org>
>   pc.c: remove a global variable, RTCState *rtc_state.
> - minor compilation fixes
> 
> Changes from v2:
> - clean up pc_pci_device_init() not to use unnecessary braces.
> 
> Changes from v1:
> - make patches full bisectable
> - typo s/allocte/allocate/
> - some minor fixes
> - dropped a merged patch
> 
> Isaku Yamahata (26):
>   pci: replace the magic, 256, for the maximum of slot
>   pci: add opaque argument to pci_map_irq_fn
>   pci: introduce pci_swizzle_map_irq_fn() for standardized interrupt
>     pin swizzle
>   pci: add accessor function to get irq levels
>   piix_pci: eliminate PIIX3State::pci_irq_levels
>   pci_bridge: add helper function to convert PCIBridge into PCIDevice
>   pci/p2pbr: generic pci p2p bridge
>   apb_pci: simplify apb_pci.c by using pci_p2pbr
>   dec_pci: simplify dec_pci.c by using pci_p2pbr
>   ide/ahci/ich: use qdev.reset
>   ahci: add ide device initialization helper
>   usb/uhci: generalize initialization
>   usb/uhci: add ich9 usb uhci id's device
>   ide: consolidate drive_get(IF_IDE)
>   smbus_eeprom: consolidate smbus eeprom creation
>   pc, pc_piix: split out allocating isa irqs
>   pc, pc_piix: split out pc nic initialization
>   ioapic: move ioapic_init() from pc_piix.c to pc.c
>   pc/piix_pci: factor out smram/pam logic
>   pc, i440fx: simply i440fx initialization
>   acpi, acpi_piix: factor out PM_TMR logic
>   acpi, acpi_piix: factor out PM1a EVT logic
>   acpi, acpi_piix: factor out PM1_CNT logic
>   acpi, acpi_piix: factor out GPE logic
>   pci_ids: add intel 82801BA pci-to-pci bridge id and
>     PCI_CLASS_SERIAL_SMBUS
>   pc q35 based chipset emulator
> 
>  Makefile.objs      |    2 +-
>  Makefile.target    |    3 +-
>  hw/acpi.c          |  197 ++++++++++++
>  hw/acpi.h          |   68 ++++
>  hw/acpi_ich9.c     |  314 +++++++++++++++++++
>  hw/acpi_ich9.h     |   53 ++++
>  hw/acpi_piix4.c    |  220 ++++----------
>  hw/apb_pci.c       |   67 ++---
>  hw/bonito.c        |    2 +-
>  hw/dec_pci.c       |   51 +---
>  hw/grackle_pci.c   |    2 +-
>  hw/gt64xxx.c       |    2 +-
>  hw/ide.h           |    6 +
>  hw/ide/ahci.c      |   15 +
>  hw/ide/core.c      |   14 +
>  hw/ide/ich.c       |    9 +-
>  hw/mips_fulong2e.c |   18 +-
>  hw/mips_malta.c    |   22 +--
>  hw/mips_r4k.c      |   10 +-
>  hw/pam.c           |  128 ++++++++
>  hw/pam.h           |   96 ++++++
>  hw/pc.c            |   47 +++-
>  hw/pc.h            |    7 +-
>  hw/pc_piix.c       |   64 +----
>  hw/pc_q35.c        |  359 +++++++++++++++++++++
>  hw/pci.c           |   27 ++-
>  hw/pci.h           |    6 +-
>  hw/pci_bridge.c    |    6 +
>  hw/pci_bridge.h    |    1 +
>  hw/pci_ids.h       |   17 +
>  hw/pci_internals.h |    2 +-
>  hw/pci_p2pbr.c     |  151 +++++++++
>  hw/pci_p2pbr.h     |   61 ++++
>  hw/piix_pci.c      |  117 +++-----
>  hw/ppc4xx_pci.c    |    2 +-
>  hw/ppc_newworld.c  |   11 +-
>  hw/ppc_oldworld.c  |   11 +-
>  hw/ppc_prep.c      |   10 +-
>  hw/ppce500_pci.c   |    2 +-
>  hw/prep_pci.c      |    2 +-
>  hw/q35.c           |  877 ++++++++++++++++++++++++++++++++++++++++++++++++++++
>  hw/q35.h           |  271 ++++++++++++++++
>  hw/q35_smbus.c     |  154 +++++++++
>  hw/sh_pci.c        |    2 +-
>  hw/smbus.h         |    3 +
>  hw/smbus_eeprom.c  |   22 ++-
>  hw/sun4u.c         |    9 +-
>  hw/unin_pci.c      |    2 +-
>  hw/usb-uhci.c      |   93 +++---
>  hw/versatile_pci.c |    2 +-
>  50 files changed, 3116 insertions(+), 521 deletions(-)
>  create mode 100644 hw/acpi_ich9.c
>  create mode 100644 hw/acpi_ich9.h
>  create mode 100644 hw/pam.c
>  create mode 100644 hw/pam.h
>  create mode 100644 hw/pc_q35.c
>  create mode 100644 hw/pci_p2pbr.c
>  create mode 100644 hw/pci_p2pbr.h
>  create mode 100644 hw/q35.c
>  create mode 100644 hw/q35.h
>  create mode 100644 hw/q35_smbus.c
> 
>