From: Cyrill Gorcunov <gorcunov@openvz.org>
To: Ingo Molnar <mingo@elte.hu>
Cc: lkml <linux-kernel@vger.kernel.org>, Lin Ming <ming.m.lin@intel.com>
Subject: [PATCH -tip] perf, x86: P4 PMU - Restore code alignment
Date: Mon, 28 Mar 2011 00:46:11 +0400 [thread overview]
Message-ID: <4D8FA213.5050108@openvz.org> (raw)
No change on functional level. This code style nit escaped
me somewhere at very first commits.
Signed-off-by: Cyrill Gorcunov <gorcunov@openvz.org>
---
Found it while were at perf-p4 code for nmi-watchdog reason
so decided to fix it just to not forget after. Note the other code
already aligned this way so this snippet stabs my eyes.
arch/x86/kernel/cpu/perf_event_p4.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/x86/kernel/cpu/perf_event_p4.c b/arch/x86/kernel/cpu/perf_event_p4.c
index c2520e1..8ff882f 100644
--- a/arch/x86/kernel/cpu/perf_event_p4.c
+++ b/arch/x86/kernel/cpu/perf_event_p4.c
@@ -468,7 +468,7 @@ static struct p4_event_bind p4_event_bind_map[] = {
.opcode = P4_OPCODE(P4_EVENT_MISPRED_BRANCH_RETIRED),
.escr_msr = { MSR_P4_CRU_ESCR0, MSR_P4_CRU_ESCR1 },
.escr_emask =
- P4_ESCR_EMASK_BIT(P4_EVENT_MISPRED_BRANCH_RETIRED, NBOGUS),
+ P4_ESCR_EMASK_BIT(P4_EVENT_MISPRED_BRANCH_RETIRED, NBOGUS),
.cntr = { {12, 13, 16}, {14, 15, 17} },
},
[P4_EVENT_X87_ASSIST] = {
--
Cyrill
next reply other threads:[~2011-03-27 20:47 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-03-27 20:46 Cyrill Gorcunov [this message]
2011-03-29 9:16 ` [tip:perf/core] perf, x86: P4 PMU - clean up the code a bit tip-bot for Cyrill Gorcunov
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