From mboxrd@z Thu Jan 1 00:00:00 1970 From: =?UTF-8?B?Q8OpZHJpYyBDYW5v?= Subject: Re: [PATCH] radeon: Fix KMS CP writeback on big endian machines. Date: Tue, 19 Apr 2011 16:38:52 +0200 Message-ID: <4DAD9E7C.10501@interfaceconcept.com> References: <4DAD4699.9010102@ic.fr> <1303203285.19141.21.camel@thor.local> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============0384205686==" Return-path: Received: from smtp01.msg.oleane.net (smtp01.msg.oleane.net [62.161.4.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 6231E9E772 for ; Tue, 19 Apr 2011 07:38:56 -0700 (PDT) In-Reply-To: <1303203285.19141.21.camel@thor.local> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: dri-devel-bounces+sf-dri-devel=m.gmane.org@lists.freedesktop.org Errors-To: dri-devel-bounces+sf-dri-devel=m.gmane.org@lists.freedesktop.org To: =?UTF-8?B?TWljaGVsIETDpG56ZXI=?= , dri-devel@lists.freedesktop.org List-Id: dri-devel@lists.freedesktop.org This is a multi-part message in MIME format. --===============0384205686== Content-Type: multipart/alternative; boundary="------------080708020102080707040108" This is a multi-part message in MIME format. --------------080708020102080707040108 Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: quoted-printable Hi, Sorry, I've done a patch in reverse mode :(. I repost the patch for r600 and evergreen write back correction for big=20 endian platforms. Cedric Signed-off-by: Cedric Cano --- diff -Nuar linux-2.6.38.2/drivers/gpu/drm/radeon/evergreen.c=20 linux-2.6.38.2/drivers/gpu/drm/radeon/evergreen.c --- linux-2.6.38.2/drivers/gpu/drm/radeon/evergreen.c 2011-03-27=20 20:37:20.000000000 +0200 +++ linux-2.6.38.2/drivers/gpu/drm/radeon/evergreen.c 2011-04-19=20 11:39:39.000000000 +0200 @@ -2587,7 +2587,7 @@ u32 wptr, tmp; if (rdev->wb.enabled) - wptr =3D rdev->wb.wb[R600_WB_IH_WPTR_OFFSET/4]; + wptr =3D le32_to_cpu(rdev->wb.wb[R600_WB_IH_WPTR_OFFSET/4]); else wptr =3D RREG32(IH_RB_WPTR); diff -Nuar linux-2.6.38.2/drivers/gpu/drm/radeon/r600.c=20 linux-2.6.38.2/drivers/gpu/drm/radeon/r600.c --- linux-2.6.38.2/drivers/gpu/drm/radeon/r600.c 2011-03-27=20 20:37:20.000000000 +0200 +++ linux-2.6.38.2/drivers/gpu/drm/radeon/r600.c 2011-04-19=20 09:52:13.000000000 +0200 @@ -3227,7 +3227,7 @@ u32 wptr, tmp; if (rdev->wb.enabled) - wptr =3D rdev->wb.wb[R600_WB_IH_WPTR_OFFSET/4]; + wptr =3D le32_to_cpu(rdev->wb.wb[R600_WB_IH_WPTR_OFFSET/4]); else wptr =3D RREG32(IH_RB_WPTR); Le 19/04/2011 10:54, Michel D=C3=A4nzer a =C3=A9crit : > On Die, 2011-04-19 at 10:23 +0200, C=C3=A9dric Cano wrote: > > > > The following patch fixes interrupt acknowledge when write-back is > > enabled on big endian platform. > > > > The same should be applied on evergreen. > > Can you include that in the patch? I somehow managed to miss these in > my previous patch for older chips. :( > > --------------080708020102080707040108 Content-Type: text/html; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Hi,

Sorry, I've done a patch in reverse mode :(.

I repost the patch for r600 and evergreen write back correction for big endian platforms.

Cedric

Signed-off-by: Cedric Cano <ccano at interfaceconcept.com>
---
diff -Nuar linux-2.6.38.2/drivers/gpu/drm/radeon/evergreen.c linux-2.6.38.2/drivers/gpu/drm/radeon/evergreen.c
--- linux-2.6.38.2/drivers/gpu/drm/radeon/evergreen.c=C2=A0=C2=A0=C2=A0= 2011-03-27 20:37:20.000000000 +0200
+++ linux-2.6.38.2/drivers/gpu/drm/radeon/evergreen.c=C2=A0=C2=A0=C2=A0= 2011-04-19 11:39:39.000000000 +0200
@@ -2587,7 +2587,7 @@
=C2=A0=C2=A0=C2=A0=C2=A0 u32 wptr, tmp;
=C2=A0
=C2=A0=C2=A0=C2=A0=C2=A0 if (rdev->wb.enabled)
-=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 wptr =3D rdev->wb.wb[R= 600_WB_IH_WPTR_OFFSET/4];
+=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 wptr =3D le32_to_cpu(rdev->wb.wb[R600_WB_IH_WPTR_OFFSET/4]);
=C2=A0=C2=A0=C2=A0=C2=A0 else
=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 wptr =3D RREG32(IH_R= B_WPTR);
=C2=A0

diff -Nuar linux-2.6.38.2/drivers/gpu/drm/radeon/r600.c linux-2.6.38.2/drivers/gpu/drm/radeon/r600.c
--- linux-2.6.38.2/drivers/gpu/drm/radeon/r600.c=C2=A0=C2=A0=C2=A0 20= 11-03-27 20:37:20.000000000 +0200
+++ linux-2.6.38.2/drivers/gpu/drm/radeon/r600.c=C2=A0=C2=A0=C2=A0 20= 11-04-19 09:52:13.000000000 +0200
@@ -3227,7 +3227,7 @@
=C2=A0=C2=A0=C2=A0=C2=A0 u32 wptr, tmp;
=C2=A0
=C2=A0=C2=A0=C2=A0=C2=A0 if (rdev->wb.enabled)
-=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 wptr =3D rdev->wb.wb[R= 600_WB_IH_WPTR_OFFSET/4];
+=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 wptr =3D le32_to_cpu(rdev->wb.wb[R600_WB_IH_WPTR_OFFSET/4]);
=C2=A0=C2=A0=C2=A0=C2=A0 else
=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 wptr =3D RREG32(IH_R= B_WPTR);
=C2=A0



Le 19/04/2011 10:54, Michel D=C3=A4nzer a =C3=A9crit :
> On Die, 2011-04-19 at 10:23 +0200, C=C3=A9dric Cano wrote:
>>
>> The following patch fixes interrupt acknowledge when write-back is
>> enabled on big endian platform.
>>
>> The same should be applied on evergreen.
>
> Can you include that in the patch? I somehow managed to miss these in
> my previous patch for older chips. :(
>
>

--------------080708020102080707040108-- --===============0384205686== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/dri-devel --===============0384205686==--