From mboxrd@z Thu Jan 1 00:00:00 1970 From: Wei Huang Subject: [PATCH] FPU LWP 7/8:export LWP related CPUID to AMD SVM guest Date: Tue, 3 May 2011 15:18:22 -0500 Message-ID: <4DC0630E.9030604@amd.com> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="------------090505030109050204060009" Return-path: List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xensource.com Errors-To: xen-devel-bounces@lists.xensource.com To: "'xen-devel@lists.xensource.com'" , Keir Fraser , Jan Beulich List-Id: xen-devel@lists.xenproject.org --------------090505030109050204060009 Content-Type: text/plain; charset="ISO-8859-1"; format=flowed Content-Transfer-Encoding: 7bit LWP: export LWP related CPUID to AMD SVM guests This patch exposes LWP CPUID 0x8000001C to SVM guests. Signed-off-by: Wei Huang --------------090505030109050204060009 Content-Type: text/plain; name="lwp7.txt" Content-Transfer-Encoding: 7bit Content-Disposition: attachment; filename="lwp7.txt" Content-Description: lwp7.txt # HG changeset patch # User Wei Huang # Date 1304449290 18000 # Node ID dbd907bf172c399fc432b973a6668f1ba8545292 # Parent 40c9bab757e1cc3964ae6869022eebba7141d6eb LWP: export LWP related CPUID to AMD SVM guest This patch exposes LWP CPUID 0x8000001C to SVM guests. Signed-off-by: Wei Huang diff -r 40c9bab757e1 -r dbd907bf172c tools/libxc/xc_cpuid_x86.c --- a/tools/libxc/xc_cpuid_x86.c Tue May 03 13:59:37 2011 -0500 +++ b/tools/libxc/xc_cpuid_x86.c Tue May 03 14:01:30 2011 -0500 @@ -31,7 +31,7 @@ #define DEF_MAX_BASE 0x0000000du #define DEF_MAX_INTELEXT 0x80000008u -#define DEF_MAX_AMDEXT 0x8000000au +#define DEF_MAX_AMDEXT 0x8000001cu static int hypervisor_is_64bit(xc_interface *xch) { @@ -111,7 +111,8 @@ bitmaskof(X86_FEATURE_3DNOWPREFETCH) | bitmaskof(X86_FEATURE_XOP) | bitmaskof(X86_FEATURE_FMA4) | - bitmaskof(X86_FEATURE_TBM)); + bitmaskof(X86_FEATURE_TBM) | + bitmaskof(X86_FEATURE_LWP)); regs[3] &= (0x0183f3ff | /* features shared with 0x00000001:EDX */ (is_pae ? bitmaskof(X86_FEATURE_NX) : 0) | (is_64bit ? bitmaskof(X86_FEATURE_LM) : 0) | @@ -385,6 +386,7 @@ case 0x80000005: /* AMD L1 cache/TLB info (dumped by Intel policy) */ case 0x80000006: /* AMD L2/3 cache/TLB info ; Intel L2 cache features */ case 0x8000000a: /* AMD SVM feature bits */ + case 0x8000001c: /* AMD lightweight profiling */ break; default: --------------090505030109050204060009 Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel --------------090505030109050204060009--