[ath9k-devel] Question about ar9002_initvals.h file in ath9k driver

[kang haiyang <hykang@dongniannetworks.com>]

Thanks you all.  Great explanations.

On 05/10/2011 11:35 PM, Mohammed Shafi wrote:
> On Tue, May 10, 2011 at 8:54 PM, Adrian Chadd <adrian@freebsd.org> wrote:
>> On 10 May 2011 22:26, kang haiyang <hykang@dongniannetworks.com> wrote:
>>> hi,
>>>
>>>  i saw some configurations in this file, but don't know the function of
>>> them.
>>>  Where can i found the document about them,  and are they hardware
>>> independent?
>>>  i mean that they are valid for all board with the corresponding radio
>>> chip.
>> The ini values are register values written to the hardware to set it
>> up for use. This way there doesn't need to be a lot more code which
>> individually sets up all of those registers.
>>
>> There's a bunch of different init values:
>>
>> * Modes - the values which change based on the operating mode (a, bg,
>> na/40, ng/40, etc)
>> * Common - common register values which don't depend upon the operating mode
>> * BankX - for the older chips, they're involved with setting up the radio
>> * Addac - something radio/baseband ? I'm not sure.
>> * RFGain - setting up the baseband RF gain registers
>>
>> There are other tables, such as Merlin rx and tx gain.
>>
>> Yes, the initialisation values can be chip dependent. Some registers
>> won't be (eg the examples below should be be the same for all chips)
>> but there's plenty of register settings which are specific to a
>> particular mac/radio.
>>
>> In terms of in-depth public documentation, you're not going to get a
>> lot of it. The stuff in Modes and Common are straight registers - the
>> first column is the register, the second (and later) values are
>> register contents. If the register name is defined in reg.h then you
>> can (partially) decode what the fields mean.
>>
>> Eg from ar5008_initvals.h:
>>
>>        {0x00001030, 0x00000230, 0x00000460, 0x000002c0, 0x00000160,
>> 0x000001e0},
>>        {0x00001070, 0x00000168, 0x000002d0, 0x00000318, 0x0000018c,
>> 0x000001e0},
>>
>> 0x1030 is AR_D_GBL_IFS_SIFS, and you can see from the other related
>> #defines that the lower four bits are the SIFS duration. If you look
>> at the code which writes to that register, you can see its in clocks,
>> rather than microseconds. So different values are needed based on
>> operating mode; 11b is 22mhz, 11g is 44mhz, 11a is 40mhz for non-fast
>> clock and 44mhz for fast-clock, it's double that for HT/40 modes.
>>
>> 0x1070 is AR_D_GBL_IFS_SLOT; same deal - lower four bits are the slot
>> duration in clock cycles. Same reason why they're different based on
>> operating mode.
>>
>> Take a look at ar5008_hw_process_ini() to see how they're written to
>> the hardware.
> Adrian,
>         thanks a lot for the explanation. no one better explain more than this.
>
> regards,
> shafi
>
>> HTH,
>>
>>
>> Adrian
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