[U-Boot] [PATCH v2 3/3] MX53: Add initial support for MX53ARD board

[Stefano Babic <sbabic@denx.de>]

On 05/17/2011 12:29 AM, Fabio Estevam wrote:
> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>

Hi Fabio,

> +#define ETHERNET_INT		(1*32 + 31)  /* GPIO2_31 */
                                 ^-- missing space

If you want to write in this form, it should be "1 * 32 + 31".

> +void weim_cs1_settings()
> +{
> +	unsigned int reg;
> +	struct weim *weim_regs = (struct weim *)WEIM_BASE_ADDR;
> +	struct iomuxc *iomuxc_regs = (struct weim *)IOMUXC_BASE_ADDR;
> +
> +	writel(0x00020001, &weim_regs->cs1gcr1);
> +	writel(0x00000000, &weim_regs->cs1gcr2);
> +	writel(0x16000202, &weim_regs->cs1rcr1);
> +	writel(0x00000002, &weim_regs->cs1rcr2);
> +	writel(0x16002082, &weim_regs->cs1wcr1);
> +	writel(0x00000000, &weim_regs->cs1wcr2);
> +	writel(0x00000000, &weim_regs->wcr);

Can you add #defines to describe the weim registers ? Thius is helpful
for MX51, too.


> +
> +	/* specify 64 MB on CS1 and CS0 */
> +	reg = readl(&iomuxc_regs->gpr1);
> +	reg &= ~0x3F;
> +	reg |= 0x1B;

A macro to set the single chip select is better, something as
CS_SET_SIZE(chipselect, size), or something like that. What do you think
about it ?

Best regards,
Stefano Babic

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